forked from Minki/linux
c987ff0d3c
Where a device driver has set a 64-bit DMA mask to indicate the absence
of addressing limitations, we still need to ensure that we don't
allocate IOVAs beyond the actual input size of the IOMMU. The reported
aperture is the most reliable way we have of inferring that input
address size, so use that to enforce a hard upper limit where available.
Fixes: 0db2e5d18f
("iommu: Implement common IOMMU ops for DMA mapping")
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
590 lines
17 KiB
C
590 lines
17 KiB
C
/*
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* A fairly generic DMA-API to IOMMU-API glue layer.
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*
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* Copyright (C) 2014-2015 ARM Ltd.
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*
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* based in part on arch/arm/mm/dma-mapping.c:
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* Copyright (C) 2000-2004 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/device.h>
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#include <linux/dma-iommu.h>
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#include <linux/gfp.h>
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#include <linux/huge_mm.h>
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#include <linux/iommu.h>
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#include <linux/iova.h>
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#include <linux/mm.h>
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#include <linux/scatterlist.h>
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#include <linux/vmalloc.h>
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int iommu_dma_init(void)
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{
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return iova_cache_get();
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}
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/**
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* iommu_get_dma_cookie - Acquire DMA-API resources for a domain
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* @domain: IOMMU domain to prepare for DMA-API usage
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*
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* IOMMU drivers should normally call this from their domain_alloc
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* callback when domain->type == IOMMU_DOMAIN_DMA.
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*/
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int iommu_get_dma_cookie(struct iommu_domain *domain)
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{
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struct iova_domain *iovad;
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if (domain->iova_cookie)
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return -EEXIST;
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iovad = kzalloc(sizeof(*iovad), GFP_KERNEL);
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domain->iova_cookie = iovad;
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return iovad ? 0 : -ENOMEM;
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}
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EXPORT_SYMBOL(iommu_get_dma_cookie);
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/**
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* iommu_put_dma_cookie - Release a domain's DMA mapping resources
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* @domain: IOMMU domain previously prepared by iommu_get_dma_cookie()
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*
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* IOMMU drivers should normally call this from their domain_free callback.
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*/
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void iommu_put_dma_cookie(struct iommu_domain *domain)
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{
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struct iova_domain *iovad = domain->iova_cookie;
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if (!iovad)
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return;
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if (iovad->granule)
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put_iova_domain(iovad);
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kfree(iovad);
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domain->iova_cookie = NULL;
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}
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EXPORT_SYMBOL(iommu_put_dma_cookie);
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/**
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* iommu_dma_init_domain - Initialise a DMA mapping domain
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* @domain: IOMMU domain previously prepared by iommu_get_dma_cookie()
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* @base: IOVA at which the mappable address space starts
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* @size: Size of IOVA space
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*
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* @base and @size should be exact multiples of IOMMU page granularity to
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* avoid rounding surprises. If necessary, we reserve the page at address 0
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* to ensure it is an invalid IOVA. It is safe to reinitialise a domain, but
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* any change which could make prior IOVAs invalid will fail.
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*/
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int iommu_dma_init_domain(struct iommu_domain *domain, dma_addr_t base, u64 size)
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{
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struct iova_domain *iovad = domain->iova_cookie;
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unsigned long order, base_pfn, end_pfn;
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if (!iovad)
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return -ENODEV;
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/* Use the smallest supported page size for IOVA granularity */
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order = __ffs(domain->pgsize_bitmap);
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base_pfn = max_t(unsigned long, 1, base >> order);
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end_pfn = (base + size - 1) >> order;
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/* Check the domain allows at least some access to the device... */
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if (domain->geometry.force_aperture) {
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if (base > domain->geometry.aperture_end ||
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base + size <= domain->geometry.aperture_start) {
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pr_warn("specified DMA range outside IOMMU capability\n");
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return -EFAULT;
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}
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/* ...then finally give it a kicking to make sure it fits */
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base_pfn = max_t(unsigned long, base_pfn,
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domain->geometry.aperture_start >> order);
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end_pfn = min_t(unsigned long, end_pfn,
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domain->geometry.aperture_end >> order);
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}
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/* All we can safely do with an existing domain is enlarge it */
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if (iovad->start_pfn) {
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if (1UL << order != iovad->granule ||
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base_pfn != iovad->start_pfn ||
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end_pfn < iovad->dma_32bit_pfn) {
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pr_warn("Incompatible range for DMA domain\n");
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return -EFAULT;
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}
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iovad->dma_32bit_pfn = end_pfn;
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} else {
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init_iova_domain(iovad, 1UL << order, base_pfn, end_pfn);
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}
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return 0;
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}
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EXPORT_SYMBOL(iommu_dma_init_domain);
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/**
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* dma_direction_to_prot - Translate DMA API directions to IOMMU API page flags
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* @dir: Direction of DMA transfer
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* @coherent: Is the DMA master cache-coherent?
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*
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* Return: corresponding IOMMU API page protection flags
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*/
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int dma_direction_to_prot(enum dma_data_direction dir, bool coherent)
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{
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int prot = coherent ? IOMMU_CACHE : 0;
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switch (dir) {
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case DMA_BIDIRECTIONAL:
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return prot | IOMMU_READ | IOMMU_WRITE;
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case DMA_TO_DEVICE:
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return prot | IOMMU_READ;
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case DMA_FROM_DEVICE:
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return prot | IOMMU_WRITE;
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default:
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return 0;
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}
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}
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static struct iova *__alloc_iova(struct iommu_domain *domain, size_t size,
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dma_addr_t dma_limit)
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{
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struct iova_domain *iovad = domain->iova_cookie;
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unsigned long shift = iova_shift(iovad);
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unsigned long length = iova_align(iovad, size) >> shift;
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if (domain->geometry.force_aperture)
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dma_limit = min(dma_limit, domain->geometry.aperture_end);
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/*
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* Enforce size-alignment to be safe - there could perhaps be an
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* attribute to control this per-device, or at least per-domain...
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*/
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return alloc_iova(iovad, length, dma_limit >> shift, true);
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}
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/* The IOVA allocator knows what we mapped, so just unmap whatever that was */
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static void __iommu_dma_unmap(struct iommu_domain *domain, dma_addr_t dma_addr)
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{
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struct iova_domain *iovad = domain->iova_cookie;
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unsigned long shift = iova_shift(iovad);
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unsigned long pfn = dma_addr >> shift;
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struct iova *iova = find_iova(iovad, pfn);
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size_t size;
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if (WARN_ON(!iova))
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return;
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size = iova_size(iova) << shift;
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size -= iommu_unmap(domain, pfn << shift, size);
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/* ...and if we can't, then something is horribly, horribly wrong */
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WARN_ON(size > 0);
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__free_iova(iovad, iova);
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}
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static void __iommu_dma_free_pages(struct page **pages, int count)
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{
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while (count--)
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__free_page(pages[count]);
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kvfree(pages);
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}
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static struct page **__iommu_dma_alloc_pages(unsigned int count,
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unsigned long order_mask, gfp_t gfp)
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{
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struct page **pages;
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unsigned int i = 0, array_size = count * sizeof(*pages);
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order_mask &= (2U << MAX_ORDER) - 1;
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if (!order_mask)
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return NULL;
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if (array_size <= PAGE_SIZE)
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pages = kzalloc(array_size, GFP_KERNEL);
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else
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pages = vzalloc(array_size);
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if (!pages)
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return NULL;
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/* IOMMU can map any pages, so himem can also be used here */
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gfp |= __GFP_NOWARN | __GFP_HIGHMEM;
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while (count) {
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struct page *page = NULL;
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unsigned int order_size;
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/*
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* Higher-order allocations are a convenience rather
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* than a necessity, hence using __GFP_NORETRY until
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* falling back to minimum-order allocations.
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*/
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for (order_mask &= (2U << __fls(count)) - 1;
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order_mask; order_mask &= ~order_size) {
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unsigned int order = __fls(order_mask);
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order_size = 1U << order;
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page = alloc_pages((order_mask - order_size) ?
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gfp | __GFP_NORETRY : gfp, order);
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if (!page)
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continue;
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if (!order)
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break;
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if (!PageCompound(page)) {
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split_page(page, order);
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break;
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} else if (!split_huge_page(page)) {
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break;
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}
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__free_pages(page, order);
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}
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if (!page) {
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__iommu_dma_free_pages(pages, i);
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return NULL;
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}
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count -= order_size;
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while (order_size--)
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pages[i++] = page++;
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}
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return pages;
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}
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/**
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* iommu_dma_free - Free a buffer allocated by iommu_dma_alloc()
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* @dev: Device which owns this buffer
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* @pages: Array of buffer pages as returned by iommu_dma_alloc()
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* @size: Size of buffer in bytes
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* @handle: DMA address of buffer
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*
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* Frees both the pages associated with the buffer, and the array
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* describing them
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*/
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void iommu_dma_free(struct device *dev, struct page **pages, size_t size,
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dma_addr_t *handle)
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{
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__iommu_dma_unmap(iommu_get_domain_for_dev(dev), *handle);
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__iommu_dma_free_pages(pages, PAGE_ALIGN(size) >> PAGE_SHIFT);
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*handle = DMA_ERROR_CODE;
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}
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/**
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* iommu_dma_alloc - Allocate and map a buffer contiguous in IOVA space
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* @dev: Device to allocate memory for. Must be a real device
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* attached to an iommu_dma_domain
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* @size: Size of buffer in bytes
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* @gfp: Allocation flags
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* @attrs: DMA attributes for this allocation
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* @prot: IOMMU mapping flags
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* @handle: Out argument for allocated DMA handle
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* @flush_page: Arch callback which must ensure PAGE_SIZE bytes from the
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* given VA/PA are visible to the given non-coherent device.
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*
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* If @size is less than PAGE_SIZE, then a full CPU page will be allocated,
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* but an IOMMU which supports smaller pages might not map the whole thing.
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*
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* Return: Array of struct page pointers describing the buffer,
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* or NULL on failure.
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*/
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struct page **iommu_dma_alloc(struct device *dev, size_t size, gfp_t gfp,
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unsigned long attrs, int prot, dma_addr_t *handle,
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void (*flush_page)(struct device *, const void *, phys_addr_t))
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{
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struct iommu_domain *domain = iommu_get_domain_for_dev(dev);
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struct iova_domain *iovad = domain->iova_cookie;
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struct iova *iova;
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struct page **pages;
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struct sg_table sgt;
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dma_addr_t dma_addr;
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unsigned int count, min_size, alloc_sizes = domain->pgsize_bitmap;
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*handle = DMA_ERROR_CODE;
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min_size = alloc_sizes & -alloc_sizes;
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if (min_size < PAGE_SIZE) {
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min_size = PAGE_SIZE;
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alloc_sizes |= PAGE_SIZE;
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} else {
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size = ALIGN(size, min_size);
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}
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if (attrs & DMA_ATTR_ALLOC_SINGLE_PAGES)
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alloc_sizes = min_size;
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count = PAGE_ALIGN(size) >> PAGE_SHIFT;
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pages = __iommu_dma_alloc_pages(count, alloc_sizes >> PAGE_SHIFT, gfp);
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if (!pages)
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return NULL;
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iova = __alloc_iova(domain, size, dev->coherent_dma_mask);
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if (!iova)
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goto out_free_pages;
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size = iova_align(iovad, size);
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if (sg_alloc_table_from_pages(&sgt, pages, count, 0, size, GFP_KERNEL))
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goto out_free_iova;
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if (!(prot & IOMMU_CACHE)) {
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struct sg_mapping_iter miter;
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/*
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* The CPU-centric flushing implied by SG_MITER_TO_SG isn't
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* sufficient here, so skip it by using the "wrong" direction.
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*/
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sg_miter_start(&miter, sgt.sgl, sgt.orig_nents, SG_MITER_FROM_SG);
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while (sg_miter_next(&miter))
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flush_page(dev, miter.addr, page_to_phys(miter.page));
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sg_miter_stop(&miter);
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}
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dma_addr = iova_dma_addr(iovad, iova);
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if (iommu_map_sg(domain, dma_addr, sgt.sgl, sgt.orig_nents, prot)
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< size)
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goto out_free_sg;
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*handle = dma_addr;
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sg_free_table(&sgt);
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return pages;
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out_free_sg:
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sg_free_table(&sgt);
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out_free_iova:
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__free_iova(iovad, iova);
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out_free_pages:
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__iommu_dma_free_pages(pages, count);
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return NULL;
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}
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/**
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* iommu_dma_mmap - Map a buffer into provided user VMA
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* @pages: Array representing buffer from iommu_dma_alloc()
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* @size: Size of buffer in bytes
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* @vma: VMA describing requested userspace mapping
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*
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* Maps the pages of the buffer in @pages into @vma. The caller is responsible
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* for verifying the correct size and protection of @vma beforehand.
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*/
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int iommu_dma_mmap(struct page **pages, size_t size, struct vm_area_struct *vma)
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{
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unsigned long uaddr = vma->vm_start;
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unsigned int i, count = PAGE_ALIGN(size) >> PAGE_SHIFT;
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int ret = -ENXIO;
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for (i = vma->vm_pgoff; i < count && uaddr < vma->vm_end; i++) {
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ret = vm_insert_page(vma, uaddr, pages[i]);
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if (ret)
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break;
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uaddr += PAGE_SIZE;
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}
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return ret;
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}
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dma_addr_t iommu_dma_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size, int prot)
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{
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dma_addr_t dma_addr;
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struct iommu_domain *domain = iommu_get_domain_for_dev(dev);
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struct iova_domain *iovad = domain->iova_cookie;
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phys_addr_t phys = page_to_phys(page) + offset;
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size_t iova_off = iova_offset(iovad, phys);
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size_t len = iova_align(iovad, size + iova_off);
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struct iova *iova = __alloc_iova(domain, len, dma_get_mask(dev));
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if (!iova)
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return DMA_ERROR_CODE;
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dma_addr = iova_dma_addr(iovad, iova);
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if (iommu_map(domain, dma_addr, phys - iova_off, len, prot)) {
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__free_iova(iovad, iova);
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return DMA_ERROR_CODE;
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}
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return dma_addr + iova_off;
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}
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void iommu_dma_unmap_page(struct device *dev, dma_addr_t handle, size_t size,
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enum dma_data_direction dir, unsigned long attrs)
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{
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__iommu_dma_unmap(iommu_get_domain_for_dev(dev), handle);
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}
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/*
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* Prepare a successfully-mapped scatterlist to give back to the caller.
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*
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* At this point the segments are already laid out by iommu_dma_map_sg() to
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* avoid individually crossing any boundaries, so we merely need to check a
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* segment's start address to avoid concatenating across one.
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*/
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static int __finalise_sg(struct device *dev, struct scatterlist *sg, int nents,
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dma_addr_t dma_addr)
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{
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struct scatterlist *s, *cur = sg;
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unsigned long seg_mask = dma_get_seg_boundary(dev);
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unsigned int cur_len = 0, max_len = dma_get_max_seg_size(dev);
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int i, count = 0;
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for_each_sg(sg, s, nents, i) {
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/* Restore this segment's original unaligned fields first */
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unsigned int s_iova_off = sg_dma_address(s);
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unsigned int s_length = sg_dma_len(s);
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unsigned int s_iova_len = s->length;
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s->offset += s_iova_off;
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s->length = s_length;
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sg_dma_address(s) = DMA_ERROR_CODE;
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sg_dma_len(s) = 0;
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/*
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* Now fill in the real DMA data. If...
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* - there is a valid output segment to append to
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* - and this segment starts on an IOVA page boundary
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* - but doesn't fall at a segment boundary
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* - and wouldn't make the resulting output segment too long
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*/
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if (cur_len && !s_iova_off && (dma_addr & seg_mask) &&
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(cur_len + s_length <= max_len)) {
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/* ...then concatenate it with the previous one */
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cur_len += s_length;
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} else {
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/* Otherwise start the next output segment */
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if (i > 0)
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cur = sg_next(cur);
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cur_len = s_length;
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count++;
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sg_dma_address(cur) = dma_addr + s_iova_off;
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}
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sg_dma_len(cur) = cur_len;
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dma_addr += s_iova_len;
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if (s_length + s_iova_off < s_iova_len)
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cur_len = 0;
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}
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return count;
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}
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/*
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* If mapping failed, then just restore the original list,
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* but making sure the DMA fields are invalidated.
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*/
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static void __invalidate_sg(struct scatterlist *sg, int nents)
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{
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struct scatterlist *s;
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int i;
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|
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for_each_sg(sg, s, nents, i) {
|
|
if (sg_dma_address(s) != DMA_ERROR_CODE)
|
|
s->offset += sg_dma_address(s);
|
|
if (sg_dma_len(s))
|
|
s->length = sg_dma_len(s);
|
|
sg_dma_address(s) = DMA_ERROR_CODE;
|
|
sg_dma_len(s) = 0;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* The DMA API client is passing in a scatterlist which could describe
|
|
* any old buffer layout, but the IOMMU API requires everything to be
|
|
* aligned to IOMMU pages. Hence the need for this complicated bit of
|
|
* impedance-matching, to be able to hand off a suitably-aligned list,
|
|
* but still preserve the original offsets and sizes for the caller.
|
|
*/
|
|
int iommu_dma_map_sg(struct device *dev, struct scatterlist *sg,
|
|
int nents, int prot)
|
|
{
|
|
struct iommu_domain *domain = iommu_get_domain_for_dev(dev);
|
|
struct iova_domain *iovad = domain->iova_cookie;
|
|
struct iova *iova;
|
|
struct scatterlist *s, *prev = NULL;
|
|
dma_addr_t dma_addr;
|
|
size_t iova_len = 0;
|
|
unsigned long mask = dma_get_seg_boundary(dev);
|
|
int i;
|
|
|
|
/*
|
|
* Work out how much IOVA space we need, and align the segments to
|
|
* IOVA granules for the IOMMU driver to handle. With some clever
|
|
* trickery we can modify the list in-place, but reversibly, by
|
|
* stashing the unaligned parts in the as-yet-unused DMA fields.
|
|
*/
|
|
for_each_sg(sg, s, nents, i) {
|
|
size_t s_iova_off = iova_offset(iovad, s->offset);
|
|
size_t s_length = s->length;
|
|
size_t pad_len = (mask - iova_len + 1) & mask;
|
|
|
|
sg_dma_address(s) = s_iova_off;
|
|
sg_dma_len(s) = s_length;
|
|
s->offset -= s_iova_off;
|
|
s_length = iova_align(iovad, s_length + s_iova_off);
|
|
s->length = s_length;
|
|
|
|
/*
|
|
* Due to the alignment of our single IOVA allocation, we can
|
|
* depend on these assumptions about the segment boundary mask:
|
|
* - If mask size >= IOVA size, then the IOVA range cannot
|
|
* possibly fall across a boundary, so we don't care.
|
|
* - If mask size < IOVA size, then the IOVA range must start
|
|
* exactly on a boundary, therefore we can lay things out
|
|
* based purely on segment lengths without needing to know
|
|
* the actual addresses beforehand.
|
|
* - The mask must be a power of 2, so pad_len == 0 if
|
|
* iova_len == 0, thus we cannot dereference prev the first
|
|
* time through here (i.e. before it has a meaningful value).
|
|
*/
|
|
if (pad_len && pad_len < s_length - 1) {
|
|
prev->length += pad_len;
|
|
iova_len += pad_len;
|
|
}
|
|
|
|
iova_len += s_length;
|
|
prev = s;
|
|
}
|
|
|
|
iova = __alloc_iova(domain, iova_len, dma_get_mask(dev));
|
|
if (!iova)
|
|
goto out_restore_sg;
|
|
|
|
/*
|
|
* We'll leave any physical concatenation to the IOMMU driver's
|
|
* implementation - it knows better than we do.
|
|
*/
|
|
dma_addr = iova_dma_addr(iovad, iova);
|
|
if (iommu_map_sg(domain, dma_addr, sg, nents, prot) < iova_len)
|
|
goto out_free_iova;
|
|
|
|
return __finalise_sg(dev, sg, nents, dma_addr);
|
|
|
|
out_free_iova:
|
|
__free_iova(iovad, iova);
|
|
out_restore_sg:
|
|
__invalidate_sg(sg, nents);
|
|
return 0;
|
|
}
|
|
|
|
void iommu_dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
|
|
enum dma_data_direction dir, unsigned long attrs)
|
|
{
|
|
/*
|
|
* The scatterlist segments are mapped into a single
|
|
* contiguous IOVA allocation, so this is incredibly easy.
|
|
*/
|
|
__iommu_dma_unmap(iommu_get_domain_for_dev(dev), sg_dma_address(sg));
|
|
}
|
|
|
|
int iommu_dma_supported(struct device *dev, u64 mask)
|
|
{
|
|
/*
|
|
* 'Special' IOMMUs which don't have the same addressing capability
|
|
* as the CPU will have to wait until we have some way to query that
|
|
* before they'll be able to use this framework.
|
|
*/
|
|
return 1;
|
|
}
|
|
|
|
int iommu_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
|
|
{
|
|
return dma_addr == DMA_ERROR_CODE;
|
|
}
|