forked from Minki/linux
b3c711a9e1
The POWER9 chip supports an LPC bus that isn't hanging off a PCI bus, so let's add support for that, mapping it to the reserved space at ISA_IO_BASE Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
30 lines
615 B
C
30 lines
615 B
C
#ifndef __ISA_BRIDGE_H
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#define __ISA_BRIDGE_H
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#ifdef CONFIG_PPC64
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extern void isa_bridge_find_early(struct pci_controller *hose);
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extern void isa_bridge_init_non_pci(struct device_node *np);
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static inline int isa_vaddr_is_ioport(void __iomem *address)
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{
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/* Check if address hits the reserved legacy IO range */
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unsigned long ea = (unsigned long)address;
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return ea >= ISA_IO_BASE && ea < ISA_IO_END;
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}
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#else
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static inline int isa_vaddr_is_ioport(void __iomem *address)
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{
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/* No specific ISA handling on ppc32 at this stage, it
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* all goes through PCI
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*/
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return 0;
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}
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#endif
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#endif /* __ISA_BRIDGE_H */
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