lipeng 820c90cb3e net: hns: Avoid Hip06 chip TX packet line bug ... There is a bug on Hip06 that tx ring interrupts packets count will be clear when drivers send data to tx ring, so that the tx packets count will never upgrade to packets line, and cause the interrupts engendered was delayed. Sometimes, it will cause sending performance lower than expected. To fix this bug, we set tx ring interrupts packets line to 1 forever, to avoid count clear. And set the gap time to 20us, to solve the problem that too many interrupts engendered when packets line is 1. This patch could advance the send performance on ARM from 6.6G to 9.37G when an iperf send thread on ARM and an iperf send thread on X86 for XGE. Signed-off-by: lipeng <lipeng321@huawei.com> Signed-off-by: Salil Mehta <salil.mehta@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>		2017-04-03 14:48:43 -07:00
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hns	net: hns: Avoid Hip06 chip TX packet line bug	2017-04-03 14:48:43 -07:00
hip04_eth.c	net: hip04: Omit private ndo_get_stats function	2017-02-14 15:03:21 -05:00
hisi_femac.c	drivers: net: generalize napi_complete_done()	2017-01-30 15:10:42 -05:00
hix5hd2_gmac.c	drivers: net: generalize napi_complete_done()	2017-01-30 15:10:42 -05:00
hns_mdio.c	net: hns: Optimise the code in hns_mdio_wait_ready()	2017-04-03 14:48:43 -07:00
Kconfig	net: hisilicon: Add Fast Ethernet MAC driver	2016-07-16 21:32:58 -07:00
Makefile	net: hisilicon: Add Fast Ethernet MAC driver	2016-07-16 21:32:58 -07:00