forked from Minki/linux
816873eaee
Add support for SFDP (JESD216B) 4-byte Address Instruction Table. This table is optional but when available, we parse it to get the 4-byte address op codes supported by the memory. Using these op codes is stateless as opposed to entering the 4-byte address mode or setting the Base Address Register (BAR). Flashes that have the 4BAIT table declared can now support SPINOR_OP_PP_1_1_4_4B and SPINOR_OP_PP_1_4_4_4B opcodes. Tested on MX25L25673G. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@microchip.com> [tudor.ambarus@microchip.com: - rework erase and page program logic, - pass DMA-able buffer to spi_nor_read_sfdp(), - introduce SPI_NOR_HAS_4BAIT - various minor updates.] Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> |
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aspeed-smc.c | ||
atmel-quadspi.c | ||
cadence-quadspi.c | ||
fsl-quadspi.c | ||
hisi-sfc.c | ||
intel-spi-pci.c | ||
intel-spi-platform.c | ||
intel-spi.c | ||
intel-spi.h | ||
Kconfig | ||
Makefile | ||
mtk-quadspi.c | ||
nxp-spifi.c | ||
spi-nor.c | ||
stm32-quadspi.c |