Jimmy Kizito 80789bcffe drm/amd/display: Implement end of training for hop in DPIA display path ... [Why & How] Clear training pattern sequence for hop in display path once clock recovery and equalization phases of DP tunnel link training completed. Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Wayne Lin <Wayne.Lin@amd.com> Acked-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Jimmy Kizito <Jimmy.Kizito@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2021-10-06 15:52:03 -04:00
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acp
amdgpu	drm/amd/display: fix DCC settings for DCN3	2021-10-06 15:50:43 -04:00
amdkfd	drm/amdkfd: remove redundant iommu cleanup code	2021-10-05 12:22:15 -04:00
display	drm/amd/display: Implement end of training for hop in DPIA display path	2021-10-06 15:52:03 -04:00
include	drm/amdgpu: add HWID of SDMA instance 2 and 3	2021-10-04 15:23:01 -04:00
pm	drm/amdgpu: convert IP version array to include instances	2021-10-04 15:23:01 -04:00