The PCM512x devices use a paged register map covering the entire register
range. Implement support for this, mapping pages in at addresses starting
at 0x100 for ease of use (though since the pages are numbered from 0 there
is going to be an off by one when looking at the first byte as a page
number).
Also mark the new registers as accessible with the exception of the
coefficient RAM which is a bit fiddly and may benefit from some extra
handling to linearise the blocks.
Signed-off-by: Mark Brown <broonie@linaro.org>
806d646607