forked from Minki/linux
7f84eef0da
xHCI host controllers can optionally implement a no-op test. This simple test ensures the OS has correctly setup all basic data structures and can correctly respond to interrupts from the host controller hardware. There are two rings exercised by the no-op test: the command ring, and the event ring. The host controller driver writes a no-op command TRB to the command ring, and rings the doorbell for the command ring (the first entry in the doorbell array). The hardware receives this event, places a command completion event on the event ring, and fires an interrupt. The host controller driver sees the interrupt, and checks the event ring for TRBs it can process, and sees the command completion event. (See the rules in xhci-ring.c for who "owns" a TRB. This is a simplified set of rules, and may not contain all the details that are in the xHCI 0.95 spec.) A timer fires every 60 seconds to debug the state of the hardware and command and event rings. This timer only runs if CONFIG_USB_XHCI_HCD_DEBUGGING is 'y'. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
152 lines
4.1 KiB
C
152 lines
4.1 KiB
C
/*
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* xHCI host controller driver PCI Bus Glue.
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*
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* Copyright (C) 2008 Intel Corp.
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*
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* Author: Sarah Sharp
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* Some code borrowed from the Linux EHCI driver.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software Foundation,
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* Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/pci.h>
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#include "xhci.h"
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static const char hcd_name[] = "xhci_hcd";
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/* called after powerup, by probe or system-pm "wakeup" */
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static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
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{
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/*
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* TODO: Implement finding debug ports later.
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* TODO: see if there are any quirks that need to be added to handle
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* new extended capabilities.
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*/
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/* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
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if (!pci_set_mwi(pdev))
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xhci_dbg(xhci, "MWI active\n");
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xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
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return 0;
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}
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/* called during probe() after chip reset completes */
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static int xhci_pci_setup(struct usb_hcd *hcd)
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{
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struct xhci_hcd *xhci = hcd_to_xhci(hcd);
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struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
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int retval;
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xhci->cap_regs = hcd->regs;
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xhci->op_regs = hcd->regs +
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HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));
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xhci->run_regs = hcd->regs +
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(xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
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/* Cache read-only capability registers */
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xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);
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xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);
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xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
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xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
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xhci_print_registers(xhci);
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/* Make sure the HC is halted. */
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retval = xhci_halt(xhci);
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if (retval)
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return retval;
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xhci_dbg(xhci, "Resetting HCD\n");
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/* Reset the internal HC memory state and registers. */
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retval = xhci_reset(xhci);
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if (retval)
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return retval;
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xhci_dbg(xhci, "Reset complete\n");
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xhci_dbg(xhci, "Calling HCD init\n");
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/* Initialize HCD and host controller data structures. */
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retval = xhci_init(hcd);
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if (retval)
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return retval;
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xhci_dbg(xhci, "Called HCD init\n");
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pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
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xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
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/* Find any debug ports */
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return xhci_pci_reinit(xhci, pdev);
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}
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static const struct hc_driver xhci_pci_hc_driver = {
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.description = hcd_name,
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.product_desc = "xHCI Host Controller",
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.hcd_priv_size = sizeof(struct xhci_hcd),
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/*
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* generic hardware linkage
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*/
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.irq = xhci_irq,
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.flags = HCD_MEMORY | HCD_USB3,
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/*
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* basic lifecycle operations
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*/
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.reset = xhci_pci_setup,
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.start = xhci_run,
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/* suspend and resume implemented later */
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.stop = xhci_stop,
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.shutdown = xhci_shutdown,
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/*
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* scheduling support
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*/
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.get_frame_number = xhci_get_frame,
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/* Implement root hub support later. */
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};
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/*-------------------------------------------------------------------------*/
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/* PCI driver selection metadata; PCI hotplugging uses this */
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static const struct pci_device_id pci_ids[] = { {
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/* handle any USB 3.0 xHCI controller */
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PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
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.driver_data = (unsigned long) &xhci_pci_hc_driver,
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},
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{ /* end: all zeroes */ }
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};
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MODULE_DEVICE_TABLE(pci, pci_ids);
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/* pci driver glue; this is a "new style" PCI driver module */
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static struct pci_driver xhci_pci_driver = {
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.name = (char *) hcd_name,
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.id_table = pci_ids,
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.probe = usb_hcd_pci_probe,
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.remove = usb_hcd_pci_remove,
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/* suspend and resume implemented later */
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.shutdown = usb_hcd_pci_shutdown,
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};
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int xhci_register_pci()
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{
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return pci_register_driver(&xhci_pci_driver);
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}
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void xhci_unregister_pci()
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{
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pci_unregister_driver(&xhci_pci_driver);
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}
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