linux/arch/x86/events/intel
Peter Zijlstra (Intel) 7f612a7f0b perf/x86: Fix full width counter, counter overflow
Lukasz reported that perf stat counters overflow handling is broken on KNL/SLM.

Both these parts have full_width_write set, and that does indeed have
a problem. In order to deal with counter wrap, we must sample the
counter at at least half the counter period (see also the sampling
theorem) such that we can unambiguously reconstruct the count.

However commit:

  069e0c3c40 ("perf/x86/intel: Support full width counting")

sets the sampling interval to the full period, not half.

Fixing that exposes another issue, in that we must not sign extend the
delta value when we shift it right; the counter cannot have
decremented after all.

With both these issues fixed, counter overflow functions correctly
again.

Reported-by: Lukasz Odzioba <lukasz.odzioba@intel.com>
Tested-by: Liang, Kan <kan.liang@intel.com>
Tested-by: Odzioba, Lukasz <lukasz.odzioba@intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Cc: stable@vger.kernel.org
Fixes: 069e0c3c40 ("perf/x86/intel: Support full width counting")
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-12-06 09:44:28 +01:00
..
bts.c perf/x86/intel/bts: Make it an exclusive PMU 2016-09-22 14:56:08 +02:00
core.c perf/x86: Fix full width counter, counter overflow 2016-12-06 09:44:28 +01:00
cqm.c perf/x86/intel/cqm: Check cqm/mbm enabled state in event init 2016-09-06 10:42:12 +02:00
cstate.c perf/x86/intel: Enable C-state residency events for Knights Mill 2016-12-06 09:44:27 +01:00
ds.c perf/x86/intel: Cure bogus unwind from PEBS entries 2016-11-22 12:36:58 +01:00
knc.c
lbr.c perf/x86/intel: Remove an inconsistent NULL check 2016-10-16 11:34:14 +02:00
Makefile x86/perf/intel/rapl: Fix module name collision with powercap intel-rapl 2016-07-06 12:51:59 +02:00
p4.c perf/x86/intel/p4: Trival indentation fix, remove space 2016-05-20 09:18:22 +02:00
p6.c
pt.c Merge branch 'perf/urgent' into perf/core, to pick up fixes 2016-09-23 07:20:33 +02:00
pt.h perf/x86/intel/pt: Add support for PTWRITE and power event tracing 2016-09-20 01:18:28 +02:00
rapl.c perf/x86/intel/rapl: Add Knights Mill CPUID 2016-10-17 10:45:09 +02:00
uncore_nhmex.c
uncore_snb.c perf/x86/uncore: Fix crash by removing bogus event_list[] handling for SNB client uncore IMC 2016-11-16 09:46:35 +01:00
uncore_snbep.c perf/x86/intel/uncore: Add Skylake server uncore support 2016-09-10 11:18:52 +02:00
uncore.c perf/x86/intel/uncore: Allow only a single PMU/box within an events group 2016-11-22 12:36:59 +01:00
uncore.h perf/x86/intel/uncore: Add Skylake server uncore support 2016-09-10 11:18:52 +02:00