6ec006ede5
The TILE-Gx chip includes an on-chip UART. This change adds support for using the UART from within the kernel. The UART shim has more functionality than is exposed here, but to keep the kernel code and binary simpler, this is a subset of the full API designed to enable a standard Linux tty serial driver only. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
121 lines
5.1 KiB
C
121 lines
5.1 KiB
C
/*
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* Copyright 2013 Tilera Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for
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* more details.
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*/
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/* Machine-generated file; do not edit. */
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#ifndef __ARCH_UART_DEF_H__
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#define __ARCH_UART_DEF_H__
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#define UART_DIVISOR 0x0158
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#define UART_FIFO_COUNT 0x0110
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#define UART_FLAG 0x0108
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#define UART_INTERRUPT_MASK 0x0208
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#define UART_INTERRUPT_MASK__RDAT_ERR_SHIFT 0
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#define UART_INTERRUPT_MASK__RDAT_ERR_WIDTH 1
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#define UART_INTERRUPT_MASK__RDAT_ERR_RESET_VAL 1
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#define UART_INTERRUPT_MASK__RDAT_ERR_RMASK 0x1
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#define UART_INTERRUPT_MASK__RDAT_ERR_MASK 0x1
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#define UART_INTERRUPT_MASK__RDAT_ERR_FIELD 0,0
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#define UART_INTERRUPT_MASK__WDAT_ERR_SHIFT 1
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#define UART_INTERRUPT_MASK__WDAT_ERR_WIDTH 1
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#define UART_INTERRUPT_MASK__WDAT_ERR_RESET_VAL 1
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#define UART_INTERRUPT_MASK__WDAT_ERR_RMASK 0x1
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#define UART_INTERRUPT_MASK__WDAT_ERR_MASK 0x2
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#define UART_INTERRUPT_MASK__WDAT_ERR_FIELD 1,1
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#define UART_INTERRUPT_MASK__FRAME_ERR_SHIFT 2
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#define UART_INTERRUPT_MASK__FRAME_ERR_WIDTH 1
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#define UART_INTERRUPT_MASK__FRAME_ERR_RESET_VAL 1
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#define UART_INTERRUPT_MASK__FRAME_ERR_RMASK 0x1
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#define UART_INTERRUPT_MASK__FRAME_ERR_MASK 0x4
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#define UART_INTERRUPT_MASK__FRAME_ERR_FIELD 2,2
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#define UART_INTERRUPT_MASK__PARITY_ERR_SHIFT 3
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#define UART_INTERRUPT_MASK__PARITY_ERR_WIDTH 1
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#define UART_INTERRUPT_MASK__PARITY_ERR_RESET_VAL 1
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#define UART_INTERRUPT_MASK__PARITY_ERR_RMASK 0x1
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#define UART_INTERRUPT_MASK__PARITY_ERR_MASK 0x8
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#define UART_INTERRUPT_MASK__PARITY_ERR_FIELD 3,3
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#define UART_INTERRUPT_MASK__RFIFO_OVERFLOW_SHIFT 4
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#define UART_INTERRUPT_MASK__RFIFO_OVERFLOW_WIDTH 1
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#define UART_INTERRUPT_MASK__RFIFO_OVERFLOW_RESET_VAL 1
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#define UART_INTERRUPT_MASK__RFIFO_OVERFLOW_RMASK 0x1
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#define UART_INTERRUPT_MASK__RFIFO_OVERFLOW_MASK 0x10
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#define UART_INTERRUPT_MASK__RFIFO_OVERFLOW_FIELD 4,4
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#define UART_INTERRUPT_MASK__RFIFO_AFULL_SHIFT 5
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#define UART_INTERRUPT_MASK__RFIFO_AFULL_WIDTH 1
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#define UART_INTERRUPT_MASK__RFIFO_AFULL_RESET_VAL 1
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#define UART_INTERRUPT_MASK__RFIFO_AFULL_RMASK 0x1
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#define UART_INTERRUPT_MASK__RFIFO_AFULL_MASK 0x20
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#define UART_INTERRUPT_MASK__RFIFO_AFULL_FIELD 5,5
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#define UART_INTERRUPT_MASK__TFIFO_RE_SHIFT 7
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#define UART_INTERRUPT_MASK__TFIFO_RE_WIDTH 1
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#define UART_INTERRUPT_MASK__TFIFO_RE_RESET_VAL 1
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#define UART_INTERRUPT_MASK__TFIFO_RE_RMASK 0x1
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#define UART_INTERRUPT_MASK__TFIFO_RE_MASK 0x80
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#define UART_INTERRUPT_MASK__TFIFO_RE_FIELD 7,7
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#define UART_INTERRUPT_MASK__RFIFO_WE_SHIFT 8
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#define UART_INTERRUPT_MASK__RFIFO_WE_WIDTH 1
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#define UART_INTERRUPT_MASK__RFIFO_WE_RESET_VAL 1
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#define UART_INTERRUPT_MASK__RFIFO_WE_RMASK 0x1
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#define UART_INTERRUPT_MASK__RFIFO_WE_MASK 0x100
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#define UART_INTERRUPT_MASK__RFIFO_WE_FIELD 8,8
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#define UART_INTERRUPT_MASK__WFIFO_RE_SHIFT 9
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#define UART_INTERRUPT_MASK__WFIFO_RE_WIDTH 1
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#define UART_INTERRUPT_MASK__WFIFO_RE_RESET_VAL 1
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#define UART_INTERRUPT_MASK__WFIFO_RE_RMASK 0x1
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#define UART_INTERRUPT_MASK__WFIFO_RE_MASK 0x200
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#define UART_INTERRUPT_MASK__WFIFO_RE_FIELD 9,9
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#define UART_INTERRUPT_MASK__RFIFO_ERR_SHIFT 10
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#define UART_INTERRUPT_MASK__RFIFO_ERR_WIDTH 1
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#define UART_INTERRUPT_MASK__RFIFO_ERR_RESET_VAL 1
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#define UART_INTERRUPT_MASK__RFIFO_ERR_RMASK 0x1
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#define UART_INTERRUPT_MASK__RFIFO_ERR_MASK 0x400
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#define UART_INTERRUPT_MASK__RFIFO_ERR_FIELD 10,10
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#define UART_INTERRUPT_MASK__TFIFO_AEMPTY_SHIFT 11
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#define UART_INTERRUPT_MASK__TFIFO_AEMPTY_WIDTH 1
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#define UART_INTERRUPT_MASK__TFIFO_AEMPTY_RESET_VAL 1
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#define UART_INTERRUPT_MASK__TFIFO_AEMPTY_RMASK 0x1
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#define UART_INTERRUPT_MASK__TFIFO_AEMPTY_MASK 0x800
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#define UART_INTERRUPT_MASK__TFIFO_AEMPTY_FIELD 11,11
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#define UART_INTERRUPT_STATUS 0x0200
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#define UART_RECEIVE_DATA 0x0148
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#define UART_TRANSMIT_DATA 0x0140
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#define UART_TYPE 0x0160
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#define UART_TYPE__SBITS_SHIFT 0
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#define UART_TYPE__SBITS_WIDTH 1
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#define UART_TYPE__SBITS_RESET_VAL 1
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#define UART_TYPE__SBITS_RMASK 0x1
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#define UART_TYPE__SBITS_MASK 0x1
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#define UART_TYPE__SBITS_FIELD 0,0
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#define UART_TYPE__SBITS_VAL_ONE_SBITS 0x0
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#define UART_TYPE__SBITS_VAL_TWO_SBITS 0x1
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#define UART_TYPE__DBITS_SHIFT 2
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#define UART_TYPE__DBITS_WIDTH 1
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#define UART_TYPE__DBITS_RESET_VAL 0
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#define UART_TYPE__DBITS_RMASK 0x1
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#define UART_TYPE__DBITS_MASK 0x4
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#define UART_TYPE__DBITS_FIELD 2,2
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#define UART_TYPE__DBITS_VAL_EIGHT_DBITS 0x0
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#define UART_TYPE__DBITS_VAL_SEVEN_DBITS 0x1
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#define UART_TYPE__PTYPE_SHIFT 4
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#define UART_TYPE__PTYPE_WIDTH 3
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#define UART_TYPE__PTYPE_RESET_VAL 3
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#define UART_TYPE__PTYPE_RMASK 0x7
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#define UART_TYPE__PTYPE_MASK 0x70
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#define UART_TYPE__PTYPE_FIELD 4,6
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#define UART_TYPE__PTYPE_VAL_NONE 0x0
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#define UART_TYPE__PTYPE_VAL_MARK 0x1
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#define UART_TYPE__PTYPE_VAL_SPACE 0x2
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#define UART_TYPE__PTYPE_VAL_EVEN 0x3
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#define UART_TYPE__PTYPE_VAL_ODD 0x4
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#endif /* !defined(__ARCH_UART_DEF_H__) */
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