Maxime Ripard 7f2ea3847d dt-bindings: clk: sun5i: add DRAM gates compatible ... The Allwinner SoCs have a gate controller to gate the access to the DRAM clock to the some devices that need to access the DRAM directly (mostly display / image related IPs). Use a simple gates driver to support the one found in the A13 / R8 SoCs. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>		2016-04-22 00:29:23 +02:00
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bindings	dt-bindings: clk: sun5i: add DRAM gates compatible	2016-04-22 00:29:23 +02:00
00-INDEX
booting-without-of.txt	sh: add device tree support and generic board using device tree	2016-03-17 19:46:11 +00:00
changesets.txt
dynamic-resolution-notes.txt
of_unittest.txt
overlay-notes.txt
todo.txt
usage-model.txt