forked from Minki/linux
415e49936b
For devices using OTP memory, EEPROM image can start from any one of the OTP blocks. If shadow RAM is disabled, we need to traverse link list to find the last valid block, then start the EEPROM image reading. If OTP is not full, the valid block is the block _before_ the last block on the link list; the last block on the link list is the empty block ready for next OTP refresh/update. If OTP is full, then the last block is the valid block to be used for configure the device. Signed-off-by: Wey-Yi Guy <wey-yi.w.guy@intel.com> Signed-off-by: Reinette Chatre <reinette.chatre@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
414 lines
17 KiB
C
414 lines
17 KiB
C
/******************************************************************************
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*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
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* USA
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*
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* The full GNU General Public License is included in this distribution
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* in the file called LICENSE.GPL.
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*
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* Contact Information:
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* Intel Linux Wireless <ilw@linux.intel.com>
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* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*
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* BSD LICENSE
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*
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* Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*****************************************************************************/
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#ifndef __iwl_eeprom_h__
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#define __iwl_eeprom_h__
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struct iwl_priv;
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/*
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* EEPROM access time values:
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*
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* Driver initiates EEPROM read by writing byte address << 1 to CSR_EEPROM_REG.
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* Driver then polls CSR_EEPROM_REG for CSR_EEPROM_REG_READ_VALID_MSK (0x1).
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* When polling, wait 10 uSec between polling loops, up to a maximum 5000 uSec.
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* Driver reads 16-bit value from bits 31-16 of CSR_EEPROM_REG.
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*/
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#define IWL_EEPROM_ACCESS_TIMEOUT 5000 /* uSec */
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#define IWL_EEPROM_SEM_TIMEOUT 10 /* microseconds */
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#define IWL_EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */
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/*
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* Regulatory channel usage flags in EEPROM struct iwl4965_eeprom_channel.flags.
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*
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* IBSS and/or AP operation is allowed *only* on those channels with
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* (VALID && IBSS && ACTIVE && !RADAR). This restriction is in place because
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* RADAR detection is not supported by the 4965 driver, but is a
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* requirement for establishing a new network for legal operation on channels
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* requiring RADAR detection or restricting ACTIVE scanning.
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*
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* NOTE: "WIDE" flag does not indicate anything about "HT40" 40 MHz channels.
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* It only indicates that 20 MHz channel use is supported; HT40 channel
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* usage is indicated by a separate set of regulatory flags for each
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* HT40 channel pair.
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*
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* NOTE: Using a channel inappropriately will result in a uCode error!
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*/
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#define IWL_NUM_TX_CALIB_GROUPS 5
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enum {
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EEPROM_CHANNEL_VALID = (1 << 0), /* usable for this SKU/geo */
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EEPROM_CHANNEL_IBSS = (1 << 1), /* usable as an IBSS channel */
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/* Bit 2 Reserved */
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EEPROM_CHANNEL_ACTIVE = (1 << 3), /* active scanning allowed */
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EEPROM_CHANNEL_RADAR = (1 << 4), /* radar detection required */
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EEPROM_CHANNEL_WIDE = (1 << 5), /* 20 MHz channel okay */
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/* Bit 6 Reserved (was Narrow Channel) */
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EEPROM_CHANNEL_DFS = (1 << 7), /* dynamic freq selection candidate */
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};
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/* SKU Capabilities */
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#define EEPROM_SKU_CAP_SW_RF_KILL_ENABLE (1 << 0)
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#define EEPROM_SKU_CAP_HW_RF_KILL_ENABLE (1 << 1)
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/* *regulatory* channel data format in eeprom, one for each channel.
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* There are separate entries for HT40 (40 MHz) vs. normal (20 MHz) channels. */
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struct iwl_eeprom_channel {
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u8 flags; /* EEPROM_CHANNEL_* flags copied from EEPROM */
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s8 max_power_avg; /* max power (dBm) on this chnl, limit 31 */
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} __attribute__ ((packed));
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/* 3945 Specific */
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#define EEPROM_3945_EEPROM_VERSION (0x2f)
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/* 4965 has two radio transmitters (and 3 radio receivers) */
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#define EEPROM_TX_POWER_TX_CHAINS (2)
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/* 4965 has room for up to 8 sets of txpower calibration data */
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#define EEPROM_TX_POWER_BANDS (8)
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/* 4965 factory calibration measures txpower gain settings for
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* each of 3 target output levels */
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#define EEPROM_TX_POWER_MEASUREMENTS (3)
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/* 4965 Specific */
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/* 4965 driver does not work with txpower calibration version < 5 */
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#define EEPROM_4965_TX_POWER_VERSION (5)
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#define EEPROM_4965_EEPROM_VERSION (0x2f)
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#define EEPROM_4965_CALIB_VERSION_OFFSET (2*0xB6) /* 2 bytes */
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#define EEPROM_4965_CALIB_TXPOWER_OFFSET (2*0xE8) /* 48 bytes */
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#define EEPROM_4965_BOARD_REVISION (2*0x4F) /* 2 bytes */
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#define EEPROM_4965_BOARD_PBA (2*0x56+1) /* 9 bytes */
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/* 5000 Specific */
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#define EEPROM_5000_TX_POWER_VERSION (4)
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#define EEPROM_5000_EEPROM_VERSION (0x11A)
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/*5000 calibrations */
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#define EEPROM_5000_CALIB_ALL (INDIRECT_ADDRESS | INDIRECT_CALIBRATION)
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#define EEPROM_5000_XTAL ((2*0x128) | EEPROM_5000_CALIB_ALL)
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#define EEPROM_5000_TEMPERATURE ((2*0x12A) | EEPROM_5000_CALIB_ALL)
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/* 5000 links */
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#define EEPROM_5000_LINK_HOST (2*0x64)
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#define EEPROM_5000_LINK_GENERAL (2*0x65)
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#define EEPROM_5000_LINK_REGULATORY (2*0x66)
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#define EEPROM_5000_LINK_CALIBRATION (2*0x67)
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#define EEPROM_5000_LINK_PROCESS_ADJST (2*0x68)
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#define EEPROM_5000_LINK_OTHERS (2*0x69)
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/* 5000 regulatory - indirect access */
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#define EEPROM_5000_REG_SKU_ID ((0x02)\
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| INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 4 bytes */
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#define EEPROM_5000_REG_BAND_1_CHANNELS ((0x08)\
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| INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 28 bytes */
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#define EEPROM_5000_REG_BAND_2_CHANNELS ((0x26)\
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| INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 26 bytes */
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#define EEPROM_5000_REG_BAND_3_CHANNELS ((0x42)\
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| INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 24 bytes */
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#define EEPROM_5000_REG_BAND_4_CHANNELS ((0x5C)\
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| INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 22 bytes */
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#define EEPROM_5000_REG_BAND_5_CHANNELS ((0x74)\
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| INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 12 bytes */
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#define EEPROM_5000_REG_BAND_24_HT40_CHANNELS ((0x82)\
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| INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 14 bytes */
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#define EEPROM_5000_REG_BAND_52_HT40_CHANNELS ((0x92)\
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| INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 22 bytes */
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/* 5050 Specific */
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#define EEPROM_5050_TX_POWER_VERSION (4)
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#define EEPROM_5050_EEPROM_VERSION (0x21E)
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/* OTP */
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/* lower blocks contain EEPROM image and calibration data */
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#define OTP_LOW_IMAGE_SIZE (2 * 512 * sizeof(u16)) /* 2 KB */
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/* high blocks contain PAPD data */
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#define OTP_HIGH_IMAGE_SIZE_6x00 (6 * 512 * sizeof(u16)) /* 6 KB */
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#define OTP_HIGH_IMAGE_SIZE_1000 (0x200 * sizeof(u16)) /* 1024 bytes */
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#define OTP_MAX_LL_ITEMS_1000 (3) /* OTP blocks for 1000 */
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#define OTP_MAX_LL_ITEMS_6x00 (4) /* OTP blocks for 6x00 */
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#define OTP_MAX_LL_ITEMS_6x50 (7) /* OTP blocks for 6x50 */
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/* 2.4 GHz */
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extern const u8 iwl_eeprom_band_1[14];
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/*
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* factory calibration data for one txpower level, on one channel,
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* measured on one of the 2 tx chains (radio transmitter and associated
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* antenna). EEPROM contains:
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*
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* 1) Temperature (degrees Celsius) of device when measurement was made.
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*
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* 2) Gain table index used to achieve the target measurement power.
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* This refers to the "well-known" gain tables (see iwl-4965-hw.h).
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*
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* 3) Actual measured output power, in half-dBm ("34" = 17 dBm).
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*
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* 4) RF power amplifier detector level measurement (not used).
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*/
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struct iwl_eeprom_calib_measure {
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u8 temperature; /* Device temperature (Celsius) */
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u8 gain_idx; /* Index into gain table */
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u8 actual_pow; /* Measured RF output power, half-dBm */
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s8 pa_det; /* Power amp detector level (not used) */
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} __attribute__ ((packed));
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/*
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* measurement set for one channel. EEPROM contains:
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*
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* 1) Channel number measured
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*
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* 2) Measurements for each of 3 power levels for each of 2 radio transmitters
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* (a.k.a. "tx chains") (6 measurements altogether)
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*/
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struct iwl_eeprom_calib_ch_info {
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u8 ch_num;
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struct iwl_eeprom_calib_measure
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measurements[EEPROM_TX_POWER_TX_CHAINS]
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[EEPROM_TX_POWER_MEASUREMENTS];
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} __attribute__ ((packed));
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/*
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* txpower subband info.
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*
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* For each frequency subband, EEPROM contains the following:
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*
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* 1) First and last channels within range of the subband. "0" values
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* indicate that this sample set is not being used.
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*
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* 2) Sample measurement sets for 2 channels close to the range endpoints.
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*/
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struct iwl_eeprom_calib_subband_info {
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u8 ch_from; /* channel number of lowest channel in subband */
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u8 ch_to; /* channel number of highest channel in subband */
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struct iwl_eeprom_calib_ch_info ch1;
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struct iwl_eeprom_calib_ch_info ch2;
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} __attribute__ ((packed));
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/*
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* txpower calibration info. EEPROM contains:
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*
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* 1) Factory-measured saturation power levels (maximum levels at which
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* tx power amplifier can output a signal without too much distortion).
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* There is one level for 2.4 GHz band and one for 5 GHz band. These
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* values apply to all channels within each of the bands.
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*
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* 2) Factory-measured power supply voltage level. This is assumed to be
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* constant (i.e. same value applies to all channels/bands) while the
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* factory measurements are being made.
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*
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* 3) Up to 8 sets of factory-measured txpower calibration values.
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* These are for different frequency ranges, since txpower gain
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* characteristics of the analog radio circuitry vary with frequency.
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*
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* Not all sets need to be filled with data;
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* struct iwl_eeprom_calib_subband_info contains range of channels
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* (0 if unused) for each set of data.
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*/
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struct iwl_eeprom_calib_info {
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u8 saturation_power24; /* half-dBm (e.g. "34" = 17 dBm) */
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u8 saturation_power52; /* half-dBm */
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s16 voltage; /* signed */
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struct iwl_eeprom_calib_subband_info
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band_info[EEPROM_TX_POWER_BANDS];
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} __attribute__ ((packed));
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#define ADDRESS_MSK 0x0000FFFF
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#define INDIRECT_TYPE_MSK 0x000F0000
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#define INDIRECT_HOST 0x00010000
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#define INDIRECT_GENERAL 0x00020000
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#define INDIRECT_REGULATORY 0x00030000
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#define INDIRECT_CALIBRATION 0x00040000
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#define INDIRECT_PROCESS_ADJST 0x00050000
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#define INDIRECT_OTHERS 0x00060000
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#define INDIRECT_ADDRESS 0x00100000
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/* General */
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#define EEPROM_DEVICE_ID (2*0x08) /* 2 bytes */
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#define EEPROM_MAC_ADDRESS (2*0x15) /* 6 bytes */
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#define EEPROM_BOARD_REVISION (2*0x35) /* 2 bytes */
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#define EEPROM_BOARD_PBA_NUMBER (2*0x3B+1) /* 9 bytes */
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#define EEPROM_VERSION (2*0x44) /* 2 bytes */
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#define EEPROM_SKU_CAP (2*0x45) /* 1 bytes */
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#define EEPROM_LEDS_MODE (2*0x45+1) /* 1 bytes */
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#define EEPROM_OEM_MODE (2*0x46) /* 2 bytes */
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#define EEPROM_WOWLAN_MODE (2*0x47) /* 2 bytes */
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#define EEPROM_RADIO_CONFIG (2*0x48) /* 2 bytes */
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#define EEPROM_3945_M_VERSION (2*0x4A) /* 1 bytes */
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#define EEPROM_ANTENNA_SWITCH_TYPE (2*0x4A+1) /* 1 bytes */
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/* The following masks are to be applied on EEPROM_RADIO_CONFIG */
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#define EEPROM_RF_CFG_TYPE_MSK(x) (x & 0x3) /* bits 0-1 */
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#define EEPROM_RF_CFG_STEP_MSK(x) ((x >> 2) & 0x3) /* bits 2-3 */
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#define EEPROM_RF_CFG_DASH_MSK(x) ((x >> 4) & 0x3) /* bits 4-5 */
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#define EEPROM_RF_CFG_PNUM_MSK(x) ((x >> 6) & 0x3) /* bits 6-7 */
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#define EEPROM_RF_CFG_TX_ANT_MSK(x) ((x >> 8) & 0xF) /* bits 8-11 */
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#define EEPROM_RF_CFG_RX_ANT_MSK(x) ((x >> 12) & 0xF) /* bits 12-15 */
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#define EEPROM_3945_RF_CFG_TYPE_MAX 0x0
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#define EEPROM_4965_RF_CFG_TYPE_MAX 0x1
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#define EEPROM_5000_RF_CFG_TYPE_MAX 0x3
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/*
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* Per-channel regulatory data.
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*
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* Each channel that *might* be supported by iwl has a fixed location
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* in EEPROM containing EEPROM_CHANNEL_* usage flags (LSB) and max regulatory
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* txpower (MSB).
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*
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* Entries immediately below are for 20 MHz channel width. HT40 (40 MHz)
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* channels (only for 4965, not supported by 3945) appear later in the EEPROM.
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*
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* 2.4 GHz channels 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
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*/
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#define EEPROM_REGULATORY_SKU_ID (2*0x60) /* 4 bytes */
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#define EEPROM_REGULATORY_BAND_1 (2*0x62) /* 2 bytes */
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#define EEPROM_REGULATORY_BAND_1_CHANNELS (2*0x63) /* 28 bytes */
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/*
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* 4.9 GHz channels 183, 184, 185, 187, 188, 189, 192, 196,
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* 5.0 GHz channels 7, 8, 11, 12, 16
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* (4915-5080MHz) (none of these is ever supported)
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*/
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#define EEPROM_REGULATORY_BAND_2 (2*0x71) /* 2 bytes */
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#define EEPROM_REGULATORY_BAND_2_CHANNELS (2*0x72) /* 26 bytes */
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/*
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* 5.2 GHz channels 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
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* (5170-5320MHz)
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*/
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#define EEPROM_REGULATORY_BAND_3 (2*0x7F) /* 2 bytes */
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#define EEPROM_REGULATORY_BAND_3_CHANNELS (2*0x80) /* 24 bytes */
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/*
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* 5.5 GHz channels 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
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* (5500-5700MHz)
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*/
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#define EEPROM_REGULATORY_BAND_4 (2*0x8C) /* 2 bytes */
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#define EEPROM_REGULATORY_BAND_4_CHANNELS (2*0x8D) /* 22 bytes */
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/*
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* 5.7 GHz channels 145, 149, 153, 157, 161, 165
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* (5725-5825MHz)
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*/
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#define EEPROM_REGULATORY_BAND_5 (2*0x98) /* 2 bytes */
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#define EEPROM_REGULATORY_BAND_5_CHANNELS (2*0x99) /* 12 bytes */
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/*
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* 2.4 GHz HT40 channels 1 (5), 2 (6), 3 (7), 4 (8), 5 (9), 6 (10), 7 (11)
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*
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* The channel listed is the center of the lower 20 MHz half of the channel.
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* The overall center frequency is actually 2 channels (10 MHz) above that,
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* and the upper half of each HT40 channel is centered 4 channels (20 MHz) away
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* from the lower half; e.g. the upper half of HT40 channel 1 is channel 5,
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* and the overall HT40 channel width centers on channel 3.
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*
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* NOTE: The RXON command uses 20 MHz channel numbers to specify the
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* control channel to which to tune. RXON also specifies whether the
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* control channel is the upper or lower half of a HT40 channel.
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*
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* NOTE: 4965 does not support HT40 channels on 2.4 GHz.
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*/
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#define EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS (2*0xA0) /* 14 bytes */
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/*
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* 5.2 GHz HT40 channels 36 (40), 44 (48), 52 (56), 60 (64),
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* 100 (104), 108 (112), 116 (120), 124 (128), 132 (136), 149 (153), 157 (161)
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*/
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#define EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS (2*0xA8) /* 22 bytes */
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#define EEPROM_REGULATORY_BAND_NO_HT40 (0)
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struct iwl_eeprom_ops {
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const u32 regulatory_bands[7];
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int (*verify_signature) (struct iwl_priv *priv);
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int (*acquire_semaphore) (struct iwl_priv *priv);
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void (*release_semaphore) (struct iwl_priv *priv);
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u16 (*calib_version) (struct iwl_priv *priv);
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const u8* (*query_addr) (const struct iwl_priv *priv, size_t offset);
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};
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void iwl_eeprom_get_mac(const struct iwl_priv *priv, u8 *mac);
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int iwl_eeprom_init(struct iwl_priv *priv);
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void iwl_eeprom_free(struct iwl_priv *priv);
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int iwl_eeprom_check_version(struct iwl_priv *priv);
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const u8 *iwl_eeprom_query_addr(const struct iwl_priv *priv, size_t offset);
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u16 iwl_eeprom_query16(const struct iwl_priv *priv, size_t offset);
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int iwlcore_eeprom_verify_signature(struct iwl_priv *priv);
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int iwlcore_eeprom_acquire_semaphore(struct iwl_priv *priv);
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void iwlcore_eeprom_release_semaphore(struct iwl_priv *priv);
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const u8 *iwlcore_eeprom_query_addr(const struct iwl_priv *priv, size_t offset);
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int iwl_init_channel_map(struct iwl_priv *priv);
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void iwl_free_channel_map(struct iwl_priv *priv);
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const struct iwl_channel_info *iwl_get_channel_info(
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const struct iwl_priv *priv,
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enum ieee80211_band band, u16 channel);
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#endif /* __iwl_eeprom_h__ */
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