forked from Minki/linux
eb3fcf007f
Move various interrupt controller bindings into the interrupt-controller/ directory. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: linux-mediatek@lists.infradead.org
106 lines
3.2 KiB
Plaintext
106 lines
3.2 KiB
Plaintext
* ImgTec Powerdown Controller (PDC) Interrupt Controller Binding
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This binding specifies what properties must be available in the device tree
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representation of a PDC IRQ controller. This has a number of input interrupt
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lines which can wake the system, and are passed on through output interrupt
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lines.
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Required properties:
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- compatible: Specifies the compatibility list for the interrupt controller.
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The type shall be <string> and the value shall include "img,pdc-intc".
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- reg: Specifies the base PDC physical address(s) and size(s) of the
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addressable register space. The type shall be <prop-encoded-array>.
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- interrupt-controller: The presence of this property identifies the node
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as an interrupt controller. No property value shall be defined.
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- #interrupt-cells: Specifies the number of cells needed to encode an
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interrupt source. The type shall be a <u32> and the value shall be 2.
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- num-perips: Number of waking peripherals.
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- num-syswakes: Number of SysWake inputs.
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- interrupts: List of interrupt specifiers. The first specifier shall be the
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shared SysWake interrupt, and remaining specifies shall be PDC peripheral
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interrupts in order.
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* Interrupt Specifier Definition
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Interrupt specifiers consists of 2 cells encoded as follows:
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- <1st-cell>: The interrupt-number that identifies the interrupt source.
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0-7: Peripheral interrupts
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8-15: SysWake interrupts
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- <2nd-cell>: The level-sense information, encoded using the Linux interrupt
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flags as follows (only 4 valid for peripheral interrupts):
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0 = none (decided by software)
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1 = low-to-high edge triggered
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2 = high-to-low edge triggered
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3 = both edge triggered
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4 = active-high level-sensitive (required for perip irqs)
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8 = active-low level-sensitive
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* Examples
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Example 1:
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/*
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* TZ1090 PDC block
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*/
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pdc: pdc@0x02006000 {
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// This is an interrupt controller node.
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interrupt-controller;
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// Three cells to encode interrupt sources.
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#interrupt-cells = <2>;
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// Offset address of 0x02006000 and size of 0x1000.
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reg = <0x02006000 0x1000>;
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// Compatible with Meta hardware trigger block.
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compatible = "img,pdc-intc";
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// Three peripherals are connected.
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num-perips = <3>;
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// Four SysWakes are connected.
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num-syswakes = <4>;
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interrupts = <18 4 /* level */>, /* Syswakes */
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<30 4 /* level */>, /* Peripheral 0 (RTC) */
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<29 4 /* level */>, /* Peripheral 1 (IR) */
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<31 4 /* level */>; /* Peripheral 2 (WDT) */
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};
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Example 2:
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/*
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* An SoC peripheral that is wired through the PDC.
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*/
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rtc0 {
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// The interrupt controller that this device is wired to.
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interrupt-parent = <&pdc>;
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// Interrupt source Peripheral 0
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interrupts = <0 /* Peripheral 0 (RTC) */
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4> /* IRQ_TYPE_LEVEL_HIGH */
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};
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Example 3:
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/*
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* An interrupt generating device that is wired to a SysWake pin.
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*/
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touchscreen0 {
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// The interrupt controller that this device is wired to.
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interrupt-parent = <&pdc>;
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// Interrupt source SysWake 0 that is active-low level-sensitive
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interrupts = <8 /* SysWake0 */
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8 /* IRQ_TYPE_LEVEL_LOW */>;
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};
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