forked from Minki/linux
7e3e68bcfd
Instead of using the DTV properties cache directly, pass the get frontend data as an argument. For now, everything should remain the same, but the next patch will prevent get_frontend to affect the global cache. This is needed because several drivers don't care enough to only change the properties if locked. Due to that, calling G_PROPERTY before locking on those drivers will make them to never lock. Ok, those drivers are crap and should never be merged like that, but the core should not rely that the drivers would be doing the right thing. Reviewed-by: Michael Ira Krufky <mkrufky@linuxtv.org> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
766 lines
17 KiB
C
766 lines
17 KiB
C
/*
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* Sony CXD2820R demodulator driver
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*
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* Copyright (C) 2010 Antti Palosaari <crope@iki.fi>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#include "cxd2820r_priv.h"
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/* Max transfer size done by I2C transfer functions */
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#define MAX_XFER_SIZE 64
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/* write multiple registers */
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static int cxd2820r_wr_regs_i2c(struct cxd2820r_priv *priv, u8 i2c, u8 reg,
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u8 *val, int len)
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{
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int ret;
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u8 buf[MAX_XFER_SIZE];
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struct i2c_msg msg[1] = {
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{
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.addr = i2c,
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.flags = 0,
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.len = len + 1,
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.buf = buf,
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}
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};
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if (1 + len > sizeof(buf)) {
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dev_warn(&priv->i2c->dev,
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"%s: i2c wr reg=%04x: len=%d is too big!\n",
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KBUILD_MODNAME, reg, len);
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return -EINVAL;
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}
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buf[0] = reg;
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memcpy(&buf[1], val, len);
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ret = i2c_transfer(priv->i2c, msg, 1);
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if (ret == 1) {
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ret = 0;
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} else {
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dev_warn(&priv->i2c->dev, "%s: i2c wr failed=%d reg=%02x " \
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"len=%d\n", KBUILD_MODNAME, ret, reg, len);
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ret = -EREMOTEIO;
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}
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return ret;
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}
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/* read multiple registers */
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static int cxd2820r_rd_regs_i2c(struct cxd2820r_priv *priv, u8 i2c, u8 reg,
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u8 *val, int len)
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{
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int ret;
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u8 buf[MAX_XFER_SIZE];
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struct i2c_msg msg[2] = {
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{
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.addr = i2c,
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.flags = 0,
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.len = 1,
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.buf = ®,
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}, {
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.addr = i2c,
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.flags = I2C_M_RD,
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.len = len,
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.buf = buf,
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}
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};
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if (len > sizeof(buf)) {
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dev_warn(&priv->i2c->dev,
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"%s: i2c wr reg=%04x: len=%d is too big!\n",
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KBUILD_MODNAME, reg, len);
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return -EINVAL;
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}
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ret = i2c_transfer(priv->i2c, msg, 2);
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if (ret == 2) {
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memcpy(val, buf, len);
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ret = 0;
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} else {
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dev_warn(&priv->i2c->dev, "%s: i2c rd failed=%d reg=%02x " \
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"len=%d\n", KBUILD_MODNAME, ret, reg, len);
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ret = -EREMOTEIO;
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}
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return ret;
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}
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/* write multiple registers */
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int cxd2820r_wr_regs(struct cxd2820r_priv *priv, u32 reginfo, u8 *val,
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int len)
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{
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int ret;
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u8 i2c_addr;
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u8 reg = (reginfo >> 0) & 0xff;
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u8 bank = (reginfo >> 8) & 0xff;
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u8 i2c = (reginfo >> 16) & 0x01;
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/* select I2C */
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if (i2c)
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i2c_addr = priv->cfg.i2c_address | (1 << 1); /* DVB-C */
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else
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i2c_addr = priv->cfg.i2c_address; /* DVB-T/T2 */
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/* switch bank if needed */
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if (bank != priv->bank[i2c]) {
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ret = cxd2820r_wr_regs_i2c(priv, i2c_addr, 0x00, &bank, 1);
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if (ret)
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return ret;
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priv->bank[i2c] = bank;
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}
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return cxd2820r_wr_regs_i2c(priv, i2c_addr, reg, val, len);
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}
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/* read multiple registers */
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int cxd2820r_rd_regs(struct cxd2820r_priv *priv, u32 reginfo, u8 *val,
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int len)
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{
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int ret;
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u8 i2c_addr;
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u8 reg = (reginfo >> 0) & 0xff;
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u8 bank = (reginfo >> 8) & 0xff;
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u8 i2c = (reginfo >> 16) & 0x01;
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/* select I2C */
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if (i2c)
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i2c_addr = priv->cfg.i2c_address | (1 << 1); /* DVB-C */
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else
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i2c_addr = priv->cfg.i2c_address; /* DVB-T/T2 */
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/* switch bank if needed */
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if (bank != priv->bank[i2c]) {
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ret = cxd2820r_wr_regs_i2c(priv, i2c_addr, 0x00, &bank, 1);
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if (ret)
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return ret;
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priv->bank[i2c] = bank;
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}
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return cxd2820r_rd_regs_i2c(priv, i2c_addr, reg, val, len);
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}
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/* write single register */
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int cxd2820r_wr_reg(struct cxd2820r_priv *priv, u32 reg, u8 val)
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{
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return cxd2820r_wr_regs(priv, reg, &val, 1);
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}
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/* read single register */
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int cxd2820r_rd_reg(struct cxd2820r_priv *priv, u32 reg, u8 *val)
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{
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return cxd2820r_rd_regs(priv, reg, val, 1);
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}
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/* write single register with mask */
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int cxd2820r_wr_reg_mask(struct cxd2820r_priv *priv, u32 reg, u8 val,
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u8 mask)
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{
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int ret;
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u8 tmp;
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/* no need for read if whole reg is written */
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if (mask != 0xff) {
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ret = cxd2820r_rd_reg(priv, reg, &tmp);
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if (ret)
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return ret;
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val &= mask;
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tmp &= ~mask;
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val |= tmp;
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}
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return cxd2820r_wr_reg(priv, reg, val);
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}
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int cxd2820r_gpio(struct dvb_frontend *fe, u8 *gpio)
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{
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struct cxd2820r_priv *priv = fe->demodulator_priv;
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int ret, i;
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u8 tmp0, tmp1;
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dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
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fe->dtv_property_cache.delivery_system);
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/* update GPIOs only when needed */
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if (!memcmp(gpio, priv->gpio, sizeof(priv->gpio)))
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return 0;
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tmp0 = 0x00;
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tmp1 = 0x00;
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for (i = 0; i < sizeof(priv->gpio); i++) {
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/* enable / disable */
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if (gpio[i] & CXD2820R_GPIO_E)
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tmp0 |= (2 << 6) >> (2 * i);
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else
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tmp0 |= (1 << 6) >> (2 * i);
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/* input / output */
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if (gpio[i] & CXD2820R_GPIO_I)
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tmp1 |= (1 << (3 + i));
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else
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tmp1 |= (0 << (3 + i));
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/* high / low */
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if (gpio[i] & CXD2820R_GPIO_H)
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tmp1 |= (1 << (0 + i));
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else
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tmp1 |= (0 << (0 + i));
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dev_dbg(&priv->i2c->dev, "%s: gpio i=%d %02x %02x\n", __func__,
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i, tmp0, tmp1);
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}
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dev_dbg(&priv->i2c->dev, "%s: wr gpio=%02x %02x\n", __func__, tmp0,
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tmp1);
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/* write bits [7:2] */
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ret = cxd2820r_wr_reg_mask(priv, 0x00089, tmp0, 0xfc);
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if (ret)
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goto error;
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/* write bits [5:0] */
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ret = cxd2820r_wr_reg_mask(priv, 0x0008e, tmp1, 0x3f);
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if (ret)
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goto error;
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memcpy(priv->gpio, gpio, sizeof(priv->gpio));
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return ret;
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error:
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dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
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return ret;
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}
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static int cxd2820r_set_frontend(struct dvb_frontend *fe)
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{
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struct cxd2820r_priv *priv = fe->demodulator_priv;
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struct dtv_frontend_properties *c = &fe->dtv_property_cache;
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int ret;
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dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
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fe->dtv_property_cache.delivery_system);
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switch (c->delivery_system) {
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case SYS_DVBT:
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ret = cxd2820r_init_t(fe);
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if (ret < 0)
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goto err;
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ret = cxd2820r_set_frontend_t(fe);
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if (ret < 0)
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goto err;
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break;
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case SYS_DVBT2:
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ret = cxd2820r_init_t(fe);
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if (ret < 0)
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goto err;
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ret = cxd2820r_set_frontend_t2(fe);
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if (ret < 0)
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goto err;
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break;
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case SYS_DVBC_ANNEX_A:
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ret = cxd2820r_init_c(fe);
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if (ret < 0)
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goto err;
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ret = cxd2820r_set_frontend_c(fe);
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if (ret < 0)
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goto err;
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break;
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default:
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dev_dbg(&priv->i2c->dev, "%s: error state=%d\n", __func__,
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fe->dtv_property_cache.delivery_system);
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ret = -EINVAL;
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break;
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}
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err:
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return ret;
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}
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static int cxd2820r_read_status(struct dvb_frontend *fe, enum fe_status *status)
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{
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struct cxd2820r_priv *priv = fe->demodulator_priv;
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int ret;
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dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
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fe->dtv_property_cache.delivery_system);
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switch (fe->dtv_property_cache.delivery_system) {
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case SYS_DVBT:
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ret = cxd2820r_read_status_t(fe, status);
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break;
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case SYS_DVBT2:
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ret = cxd2820r_read_status_t2(fe, status);
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break;
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case SYS_DVBC_ANNEX_A:
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ret = cxd2820r_read_status_c(fe, status);
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break;
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default:
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ret = -EINVAL;
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break;
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}
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return ret;
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}
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static int cxd2820r_get_frontend(struct dvb_frontend *fe,
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struct dtv_frontend_properties *p)
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{
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struct cxd2820r_priv *priv = fe->demodulator_priv;
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int ret;
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dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
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fe->dtv_property_cache.delivery_system);
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if (priv->delivery_system == SYS_UNDEFINED)
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return 0;
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switch (fe->dtv_property_cache.delivery_system) {
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case SYS_DVBT:
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ret = cxd2820r_get_frontend_t(fe, p);
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break;
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case SYS_DVBT2:
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ret = cxd2820r_get_frontend_t2(fe, p);
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break;
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case SYS_DVBC_ANNEX_A:
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ret = cxd2820r_get_frontend_c(fe, p);
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break;
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default:
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ret = -EINVAL;
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break;
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}
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return ret;
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}
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static int cxd2820r_read_ber(struct dvb_frontend *fe, u32 *ber)
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{
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struct cxd2820r_priv *priv = fe->demodulator_priv;
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int ret;
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dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
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fe->dtv_property_cache.delivery_system);
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switch (fe->dtv_property_cache.delivery_system) {
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case SYS_DVBT:
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ret = cxd2820r_read_ber_t(fe, ber);
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break;
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case SYS_DVBT2:
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ret = cxd2820r_read_ber_t2(fe, ber);
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break;
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case SYS_DVBC_ANNEX_A:
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ret = cxd2820r_read_ber_c(fe, ber);
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break;
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default:
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ret = -EINVAL;
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break;
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}
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return ret;
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}
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static int cxd2820r_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
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{
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struct cxd2820r_priv *priv = fe->demodulator_priv;
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int ret;
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dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
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fe->dtv_property_cache.delivery_system);
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switch (fe->dtv_property_cache.delivery_system) {
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case SYS_DVBT:
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ret = cxd2820r_read_signal_strength_t(fe, strength);
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break;
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case SYS_DVBT2:
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ret = cxd2820r_read_signal_strength_t2(fe, strength);
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break;
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case SYS_DVBC_ANNEX_A:
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ret = cxd2820r_read_signal_strength_c(fe, strength);
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break;
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default:
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ret = -EINVAL;
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break;
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}
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return ret;
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}
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static int cxd2820r_read_snr(struct dvb_frontend *fe, u16 *snr)
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{
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struct cxd2820r_priv *priv = fe->demodulator_priv;
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int ret;
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dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
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fe->dtv_property_cache.delivery_system);
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switch (fe->dtv_property_cache.delivery_system) {
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case SYS_DVBT:
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ret = cxd2820r_read_snr_t(fe, snr);
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break;
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case SYS_DVBT2:
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ret = cxd2820r_read_snr_t2(fe, snr);
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break;
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case SYS_DVBC_ANNEX_A:
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ret = cxd2820r_read_snr_c(fe, snr);
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break;
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default:
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ret = -EINVAL;
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break;
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}
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return ret;
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}
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|
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static int cxd2820r_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
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{
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struct cxd2820r_priv *priv = fe->demodulator_priv;
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int ret;
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dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
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fe->dtv_property_cache.delivery_system);
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switch (fe->dtv_property_cache.delivery_system) {
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case SYS_DVBT:
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ret = cxd2820r_read_ucblocks_t(fe, ucblocks);
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break;
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case SYS_DVBT2:
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ret = cxd2820r_read_ucblocks_t2(fe, ucblocks);
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break;
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case SYS_DVBC_ANNEX_A:
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ret = cxd2820r_read_ucblocks_c(fe, ucblocks);
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break;
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default:
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ret = -EINVAL;
|
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break;
|
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}
|
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return ret;
|
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}
|
|
|
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static int cxd2820r_init(struct dvb_frontend *fe)
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{
|
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return 0;
|
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}
|
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|
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static int cxd2820r_sleep(struct dvb_frontend *fe)
|
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{
|
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struct cxd2820r_priv *priv = fe->demodulator_priv;
|
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int ret;
|
|
|
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dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
|
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fe->dtv_property_cache.delivery_system);
|
|
|
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switch (fe->dtv_property_cache.delivery_system) {
|
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case SYS_DVBT:
|
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ret = cxd2820r_sleep_t(fe);
|
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break;
|
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case SYS_DVBT2:
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ret = cxd2820r_sleep_t2(fe);
|
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break;
|
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case SYS_DVBC_ANNEX_A:
|
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ret = cxd2820r_sleep_c(fe);
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break;
|
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default:
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ret = -EINVAL;
|
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break;
|
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}
|
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return ret;
|
|
}
|
|
|
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static int cxd2820r_get_tune_settings(struct dvb_frontend *fe,
|
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struct dvb_frontend_tune_settings *s)
|
|
{
|
|
struct cxd2820r_priv *priv = fe->demodulator_priv;
|
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int ret;
|
|
|
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dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
|
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fe->dtv_property_cache.delivery_system);
|
|
|
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switch (fe->dtv_property_cache.delivery_system) {
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case SYS_DVBT:
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ret = cxd2820r_get_tune_settings_t(fe, s);
|
|
break;
|
|
case SYS_DVBT2:
|
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ret = cxd2820r_get_tune_settings_t2(fe, s);
|
|
break;
|
|
case SYS_DVBC_ANNEX_A:
|
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ret = cxd2820r_get_tune_settings_c(fe, s);
|
|
break;
|
|
default:
|
|
ret = -EINVAL;
|
|
break;
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
static enum dvbfe_search cxd2820r_search(struct dvb_frontend *fe)
|
|
{
|
|
struct cxd2820r_priv *priv = fe->demodulator_priv;
|
|
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
|
|
int ret, i;
|
|
enum fe_status status = 0;
|
|
|
|
dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
|
|
fe->dtv_property_cache.delivery_system);
|
|
|
|
/* switch between DVB-T and DVB-T2 when tune fails */
|
|
if (priv->last_tune_failed) {
|
|
if (priv->delivery_system == SYS_DVBT) {
|
|
ret = cxd2820r_sleep_t(fe);
|
|
if (ret)
|
|
goto error;
|
|
|
|
c->delivery_system = SYS_DVBT2;
|
|
} else if (priv->delivery_system == SYS_DVBT2) {
|
|
ret = cxd2820r_sleep_t2(fe);
|
|
if (ret)
|
|
goto error;
|
|
|
|
c->delivery_system = SYS_DVBT;
|
|
}
|
|
}
|
|
|
|
/* set frontend */
|
|
ret = cxd2820r_set_frontend(fe);
|
|
if (ret)
|
|
goto error;
|
|
|
|
|
|
/* frontend lock wait loop count */
|
|
switch (priv->delivery_system) {
|
|
case SYS_DVBT:
|
|
case SYS_DVBC_ANNEX_A:
|
|
i = 20;
|
|
break;
|
|
case SYS_DVBT2:
|
|
i = 40;
|
|
break;
|
|
case SYS_UNDEFINED:
|
|
default:
|
|
i = 0;
|
|
break;
|
|
}
|
|
|
|
/* wait frontend lock */
|
|
for (; i > 0; i--) {
|
|
dev_dbg(&priv->i2c->dev, "%s: loop=%d\n", __func__, i);
|
|
msleep(50);
|
|
ret = cxd2820r_read_status(fe, &status);
|
|
if (ret)
|
|
goto error;
|
|
|
|
if (status & FE_HAS_LOCK)
|
|
break;
|
|
}
|
|
|
|
/* check if we have a valid signal */
|
|
if (status & FE_HAS_LOCK) {
|
|
priv->last_tune_failed = false;
|
|
return DVBFE_ALGO_SEARCH_SUCCESS;
|
|
} else {
|
|
priv->last_tune_failed = true;
|
|
return DVBFE_ALGO_SEARCH_AGAIN;
|
|
}
|
|
|
|
error:
|
|
dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
|
|
return DVBFE_ALGO_SEARCH_ERROR;
|
|
}
|
|
|
|
static int cxd2820r_get_frontend_algo(struct dvb_frontend *fe)
|
|
{
|
|
return DVBFE_ALGO_CUSTOM;
|
|
}
|
|
|
|
static void cxd2820r_release(struct dvb_frontend *fe)
|
|
{
|
|
struct cxd2820r_priv *priv = fe->demodulator_priv;
|
|
|
|
dev_dbg(&priv->i2c->dev, "%s\n", __func__);
|
|
|
|
#ifdef CONFIG_GPIOLIB
|
|
/* remove GPIOs */
|
|
if (priv->gpio_chip.label)
|
|
gpiochip_remove(&priv->gpio_chip);
|
|
|
|
#endif
|
|
kfree(priv);
|
|
return;
|
|
}
|
|
|
|
static int cxd2820r_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
|
|
{
|
|
struct cxd2820r_priv *priv = fe->demodulator_priv;
|
|
|
|
dev_dbg(&priv->i2c->dev, "%s: %d\n", __func__, enable);
|
|
|
|
/* Bit 0 of reg 0xdb in bank 0x00 controls I2C repeater */
|
|
return cxd2820r_wr_reg_mask(priv, 0xdb, enable ? 1 : 0, 0x1);
|
|
}
|
|
|
|
#ifdef CONFIG_GPIOLIB
|
|
static int cxd2820r_gpio_direction_output(struct gpio_chip *chip, unsigned nr,
|
|
int val)
|
|
{
|
|
struct cxd2820r_priv *priv = gpiochip_get_data(chip);
|
|
u8 gpio[GPIO_COUNT];
|
|
|
|
dev_dbg(&priv->i2c->dev, "%s: nr=%d val=%d\n", __func__, nr, val);
|
|
|
|
memcpy(gpio, priv->gpio, sizeof(gpio));
|
|
gpio[nr] = CXD2820R_GPIO_E | CXD2820R_GPIO_O | (val << 2);
|
|
|
|
return cxd2820r_gpio(&priv->fe, gpio);
|
|
}
|
|
|
|
static void cxd2820r_gpio_set(struct gpio_chip *chip, unsigned nr, int val)
|
|
{
|
|
struct cxd2820r_priv *priv = gpiochip_get_data(chip);
|
|
u8 gpio[GPIO_COUNT];
|
|
|
|
dev_dbg(&priv->i2c->dev, "%s: nr=%d val=%d\n", __func__, nr, val);
|
|
|
|
memcpy(gpio, priv->gpio, sizeof(gpio));
|
|
gpio[nr] = CXD2820R_GPIO_E | CXD2820R_GPIO_O | (val << 2);
|
|
|
|
(void) cxd2820r_gpio(&priv->fe, gpio);
|
|
|
|
return;
|
|
}
|
|
|
|
static int cxd2820r_gpio_get(struct gpio_chip *chip, unsigned nr)
|
|
{
|
|
struct cxd2820r_priv *priv = gpiochip_get_data(chip);
|
|
|
|
dev_dbg(&priv->i2c->dev, "%s: nr=%d\n", __func__, nr);
|
|
|
|
return (priv->gpio[nr] >> 2) & 0x01;
|
|
}
|
|
#endif
|
|
|
|
static const struct dvb_frontend_ops cxd2820r_ops = {
|
|
.delsys = { SYS_DVBT, SYS_DVBT2, SYS_DVBC_ANNEX_A },
|
|
/* default: DVB-T/T2 */
|
|
.info = {
|
|
.name = "Sony CXD2820R",
|
|
|
|
.caps = FE_CAN_FEC_1_2 |
|
|
FE_CAN_FEC_2_3 |
|
|
FE_CAN_FEC_3_4 |
|
|
FE_CAN_FEC_5_6 |
|
|
FE_CAN_FEC_7_8 |
|
|
FE_CAN_FEC_AUTO |
|
|
FE_CAN_QPSK |
|
|
FE_CAN_QAM_16 |
|
|
FE_CAN_QAM_32 |
|
|
FE_CAN_QAM_64 |
|
|
FE_CAN_QAM_128 |
|
|
FE_CAN_QAM_256 |
|
|
FE_CAN_QAM_AUTO |
|
|
FE_CAN_TRANSMISSION_MODE_AUTO |
|
|
FE_CAN_GUARD_INTERVAL_AUTO |
|
|
FE_CAN_HIERARCHY_AUTO |
|
|
FE_CAN_MUTE_TS |
|
|
FE_CAN_2G_MODULATION |
|
|
FE_CAN_MULTISTREAM
|
|
},
|
|
|
|
.release = cxd2820r_release,
|
|
.init = cxd2820r_init,
|
|
.sleep = cxd2820r_sleep,
|
|
|
|
.get_tune_settings = cxd2820r_get_tune_settings,
|
|
.i2c_gate_ctrl = cxd2820r_i2c_gate_ctrl,
|
|
|
|
.get_frontend = cxd2820r_get_frontend,
|
|
|
|
.get_frontend_algo = cxd2820r_get_frontend_algo,
|
|
.search = cxd2820r_search,
|
|
|
|
.read_status = cxd2820r_read_status,
|
|
.read_snr = cxd2820r_read_snr,
|
|
.read_ber = cxd2820r_read_ber,
|
|
.read_ucblocks = cxd2820r_read_ucblocks,
|
|
.read_signal_strength = cxd2820r_read_signal_strength,
|
|
};
|
|
|
|
struct dvb_frontend *cxd2820r_attach(const struct cxd2820r_config *cfg,
|
|
struct i2c_adapter *i2c, int *gpio_chip_base
|
|
)
|
|
{
|
|
struct cxd2820r_priv *priv;
|
|
int ret;
|
|
u8 tmp;
|
|
|
|
priv = kzalloc(sizeof(struct cxd2820r_priv), GFP_KERNEL);
|
|
if (!priv) {
|
|
ret = -ENOMEM;
|
|
dev_err(&i2c->dev, "%s: kzalloc() failed\n",
|
|
KBUILD_MODNAME);
|
|
goto error;
|
|
}
|
|
|
|
priv->i2c = i2c;
|
|
memcpy(&priv->cfg, cfg, sizeof(struct cxd2820r_config));
|
|
memcpy(&priv->fe.ops, &cxd2820r_ops, sizeof(struct dvb_frontend_ops));
|
|
priv->fe.demodulator_priv = priv;
|
|
|
|
priv->bank[0] = priv->bank[1] = 0xff;
|
|
ret = cxd2820r_rd_reg(priv, 0x000fd, &tmp);
|
|
dev_dbg(&priv->i2c->dev, "%s: chip id=%02x\n", __func__, tmp);
|
|
if (ret || tmp != 0xe1)
|
|
goto error;
|
|
|
|
if (gpio_chip_base) {
|
|
#ifdef CONFIG_GPIOLIB
|
|
/* add GPIOs */
|
|
priv->gpio_chip.label = KBUILD_MODNAME;
|
|
priv->gpio_chip.parent = &priv->i2c->dev;
|
|
priv->gpio_chip.owner = THIS_MODULE;
|
|
priv->gpio_chip.direction_output =
|
|
cxd2820r_gpio_direction_output;
|
|
priv->gpio_chip.set = cxd2820r_gpio_set;
|
|
priv->gpio_chip.get = cxd2820r_gpio_get;
|
|
priv->gpio_chip.base = -1; /* dynamic allocation */
|
|
priv->gpio_chip.ngpio = GPIO_COUNT;
|
|
priv->gpio_chip.can_sleep = 1;
|
|
ret = gpiochip_add_data(&priv->gpio_chip, priv);
|
|
if (ret)
|
|
goto error;
|
|
|
|
dev_dbg(&priv->i2c->dev, "%s: gpio_chip.base=%d\n", __func__,
|
|
priv->gpio_chip.base);
|
|
|
|
*gpio_chip_base = priv->gpio_chip.base;
|
|
#else
|
|
/*
|
|
* Use static GPIO configuration if GPIOLIB is undefined.
|
|
* This is fallback condition.
|
|
*/
|
|
u8 gpio[GPIO_COUNT];
|
|
gpio[0] = (*gpio_chip_base >> 0) & 0x07;
|
|
gpio[1] = (*gpio_chip_base >> 3) & 0x07;
|
|
gpio[2] = 0;
|
|
ret = cxd2820r_gpio(&priv->fe, gpio);
|
|
if (ret)
|
|
goto error;
|
|
#endif
|
|
}
|
|
|
|
return &priv->fe;
|
|
error:
|
|
dev_dbg(&i2c->dev, "%s: failed=%d\n", __func__, ret);
|
|
kfree(priv);
|
|
return NULL;
|
|
}
|
|
EXPORT_SYMBOL(cxd2820r_attach);
|
|
|
|
MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
|
|
MODULE_DESCRIPTION("Sony CXD2820R demodulator driver");
|
|
MODULE_LICENSE("GPL");
|