Paul Cercueil 7ca4c922aa clk: ingenic: Fix doc of ingenic_cgu_div_info ... The 'div' field does not represent a number of bits used to divide (understand: right-shift) the divider, but a number itself used to divide the divider. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Maarten ter Huurne <maarten@treewalker.org> Cc: <stable@vger.kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>		2019-02-22 10:13:44 -08:00
..
cgu.c	clk: ingenic: Fix round_rate misbehaving with non-integer dividers	2019-02-22 10:13:43 -08:00
cgu.h	clk: ingenic: Fix doc of ingenic_cgu_div_info	2019-02-22 10:13:44 -08:00
jz4725b-cgu.c	clk: Add Ingenic jz4725b CGU driver	2018-10-16 15:19:48 -07:00
jz4740-cgu.c	clk: ingenic: jz4740: Fix gating of UDC clock	2019-02-05 13:32:26 -08:00
jz4770-cgu.c	clk: ingenic: jz4770: Add 150us delay after enabling VPU clock	2018-06-01 23:21:39 -07:00
jz4780-cgu.c	clk: ingenic: Use const pointer to clk_ops in struct	2018-01-18 22:04:36 +00:00
Kconfig	clk: Add Ingenic jz4725b CGU driver	2018-10-16 15:19:48 -07:00
Makefile	clk: Add Ingenic jz4725b CGU driver	2018-10-16 15:19:48 -07:00