forked from Minki/linux
7c9e6150f2
Mostly the mxs system design uses saif0 mclk output as the clock source of codec. Since the mclk is implemented as a general divider with the saif clk as the parent clock, let's register the mclk as a basic clk-divider to common clock framework. Then with it being a clock provdier, clk_get() call in codec driver probe function will just work. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Mark Brown <broonie@linaro.org> |
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.. | ||
Kconfig | ||
Makefile | ||
mxs-pcm.c | ||
mxs-pcm.h | ||
mxs-saif.c | ||
mxs-saif.h | ||
mxs-sgtl5000.c |