7c62f299ba
Add L2 cache controller nodes for all the UniPhier SoC DTSI. Also, add an L3 cache controller node for PH1-Pro5 DTSI. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Olof Johansson <olof@lixom.net> |
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bootp | ||
compressed | ||
dts | ||
.gitignore | ||
install.sh | ||
Makefile |