Ben Skeggs 7c11c99b3c drm/nouveau/bios/dcb: accept "maxwell" lane count values for dcb 4.0 ... We previously assumed that the values "2" and "4" were new in DCB 4.1, however, there's at least one GM107 DCB 4.0 board (Quadro K620) that uses the newer values. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>		2015-08-28 12:40:04 +10:00
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core	drm/nouveau/mmu: namespace + nvidia gpu names (no binary change)	2015-01-22 12:17:57 +10:00
engine	drm/nouveau/nv46: Change mc subdev oclass from nv44 to nv4c	2015-08-28 12:40:04 +10:00
subdev	drm/nouveau/bios/dcb: accept "maxwell" lane count values for dcb 4.0	2015-08-28 12:40:04 +10:00
Kbuild	drm/nouveau: remove symlinks, move core/ to nvkm/ (no code changes)	2015-01-22 12:15:10 +10:00