linux/arch/xtensa
Max Filippov 7bb516ca54 xtensa: rework noMMU cache attributes initialization
Marking default memory region as cached is not always sufficient and is
not flexible. Allow specifying cache attributes for the whole memory
address space with new config entry MEMMAP_CACHEATTR. Apply it after
cache initialization.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-08-13 20:08:19 -07:00
..
boot Xtensa improvements for v4.16: 2018-01-29 16:40:28 -08:00
configs xtensa: rework noMMU cache attributes initialization 2018-08-13 20:08:19 -07:00
include xtensa: rework noMMU cache attributes initialization 2018-08-13 20:08:19 -07:00
kernel xtensa: rework noMMU cache attributes initialization 2018-08-13 20:08:19 -07:00
lib xtensa: add support for KASAN 2017-12-16 22:37:12 -08:00
mm signal/xtensa: Use force_sig_fault where appropriate 2018-04-25 10:44:12 -05:00
oprofile License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
platforms tty: replace ->proc_fops with ->proc_show 2018-05-16 07:24:30 +02:00
variants xtensa: Added Cadence CSP kernel configuration for Xtensa 2016-09-09 18:39:09 -07:00
Kconfig xtensa: rework noMMU cache attributes initialization 2018-08-13 20:08:19 -07:00
Kconfig.debug License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
Makefile xtensa: build kernel with text-section-literals 2017-12-10 14:48:51 -08:00