forked from Minki/linux
8c7b7faaa6
It hasn't "summed" anything in over 7 years, and it's just a straight mempcy ala skb_copy_to_linear_data() so just get rid of it. Signed-off-by: David S. Miller <davem@davemloft.net>
784 lines
26 KiB
C
784 lines
26 KiB
C
/*
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drivers/net/tulip/interrupt.c
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Maintained by Valerie Henson <val_henson@linux.intel.com>
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Copyright 2000,2001 The Linux Kernel Team
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Written/copyright 1994-2001 by Donald Becker.
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This software may be used and distributed according to the terms
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of the GNU General Public License, incorporated herein by reference.
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Please refer to Documentation/DocBook/tulip-user.{pdf,ps,html}
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for more information on this driver, or visit the project
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Web page at http://sourceforge.net/projects/tulip/
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*/
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#include <linux/pci.h>
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#include "tulip.h"
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#include <linux/etherdevice.h>
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int tulip_rx_copybreak;
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unsigned int tulip_max_interrupt_work;
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#ifdef CONFIG_TULIP_NAPI_HW_MITIGATION
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#define MIT_SIZE 15
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#define MIT_TABLE 15 /* We use 0 or max */
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static unsigned int mit_table[MIT_SIZE+1] =
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{
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/* CRS11 21143 hardware Mitigation Control Interrupt
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We use only RX mitigation we other techniques for
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TX intr. mitigation.
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31 Cycle Size (timer control)
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30:27 TX timer in 16 * Cycle size
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26:24 TX No pkts before Int.
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23:20 RX timer in Cycle size
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19:17 RX No pkts before Int.
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16 Continues Mode (CM)
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*/
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0x0, /* IM disabled */
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0x80150000, /* RX time = 1, RX pkts = 2, CM = 1 */
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0x80150000,
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0x80270000,
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0x80370000,
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0x80490000,
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0x80590000,
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0x80690000,
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0x807B0000,
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0x808B0000,
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0x809D0000,
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0x80AD0000,
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0x80BD0000,
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0x80CF0000,
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0x80DF0000,
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// 0x80FF0000 /* RX time = 16, RX pkts = 7, CM = 1 */
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0x80F10000 /* RX time = 16, RX pkts = 0, CM = 1 */
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};
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#endif
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int tulip_refill_rx(struct net_device *dev)
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{
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struct tulip_private *tp = netdev_priv(dev);
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int entry;
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int refilled = 0;
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/* Refill the Rx ring buffers. */
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for (; tp->cur_rx - tp->dirty_rx > 0; tp->dirty_rx++) {
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entry = tp->dirty_rx % RX_RING_SIZE;
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if (tp->rx_buffers[entry].skb == NULL) {
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struct sk_buff *skb;
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dma_addr_t mapping;
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skb = tp->rx_buffers[entry].skb = dev_alloc_skb(PKT_BUF_SZ);
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if (skb == NULL)
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break;
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mapping = pci_map_single(tp->pdev, skb->data, PKT_BUF_SZ,
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PCI_DMA_FROMDEVICE);
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tp->rx_buffers[entry].mapping = mapping;
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skb->dev = dev; /* Mark as being used by this device. */
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tp->rx_ring[entry].buffer1 = cpu_to_le32(mapping);
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refilled++;
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}
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tp->rx_ring[entry].status = cpu_to_le32(DescOwned);
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}
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if(tp->chip_id == LC82C168) {
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if(((ioread32(tp->base_addr + CSR5)>>17)&0x07) == 4) {
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/* Rx stopped due to out of buffers,
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* restart it
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*/
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iowrite32(0x01, tp->base_addr + CSR2);
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}
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}
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return refilled;
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}
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#ifdef CONFIG_TULIP_NAPI
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void oom_timer(unsigned long data)
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{
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struct net_device *dev = (struct net_device *)data;
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netif_rx_schedule(dev);
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}
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int tulip_poll(struct net_device *dev, int *budget)
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{
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struct tulip_private *tp = netdev_priv(dev);
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int entry = tp->cur_rx % RX_RING_SIZE;
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int rx_work_limit = *budget;
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int received = 0;
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if (!netif_running(dev))
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goto done;
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if (rx_work_limit > dev->quota)
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rx_work_limit = dev->quota;
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#ifdef CONFIG_TULIP_NAPI_HW_MITIGATION
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/* that one buffer is needed for mit activation; or might be a
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bug in the ring buffer code; check later -- JHS*/
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if (rx_work_limit >=RX_RING_SIZE) rx_work_limit--;
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#endif
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if (tulip_debug > 4)
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printk(KERN_DEBUG " In tulip_rx(), entry %d %8.8x.\n", entry,
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tp->rx_ring[entry].status);
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do {
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if (ioread32(tp->base_addr + CSR5) == 0xffffffff) {
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printk(KERN_DEBUG " In tulip_poll(), hardware disappeared.\n");
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break;
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}
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/* Acknowledge current RX interrupt sources. */
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iowrite32((RxIntr | RxNoBuf), tp->base_addr + CSR5);
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/* If we own the next entry, it is a new packet. Send it up. */
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while ( ! (tp->rx_ring[entry].status & cpu_to_le32(DescOwned))) {
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s32 status = le32_to_cpu(tp->rx_ring[entry].status);
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if (tp->dirty_rx + RX_RING_SIZE == tp->cur_rx)
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break;
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if (tulip_debug > 5)
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printk(KERN_DEBUG "%s: In tulip_rx(), entry %d %8.8x.\n",
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dev->name, entry, status);
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if (--rx_work_limit < 0)
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goto not_done;
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if ((status & 0x38008300) != 0x0300) {
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if ((status & 0x38000300) != 0x0300) {
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/* Ingore earlier buffers. */
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if ((status & 0xffff) != 0x7fff) {
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if (tulip_debug > 1)
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printk(KERN_WARNING "%s: Oversized Ethernet frame "
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"spanned multiple buffers, status %8.8x!\n",
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dev->name, status);
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tp->stats.rx_length_errors++;
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}
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} else if (status & RxDescFatalErr) {
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/* There was a fatal error. */
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if (tulip_debug > 2)
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printk(KERN_DEBUG "%s: Receive error, Rx status %8.8x.\n",
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dev->name, status);
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tp->stats.rx_errors++; /* end of a packet.*/
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if (status & 0x0890) tp->stats.rx_length_errors++;
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if (status & 0x0004) tp->stats.rx_frame_errors++;
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if (status & 0x0002) tp->stats.rx_crc_errors++;
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if (status & 0x0001) tp->stats.rx_fifo_errors++;
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}
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} else {
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/* Omit the four octet CRC from the length. */
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short pkt_len = ((status >> 16) & 0x7ff) - 4;
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struct sk_buff *skb;
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#ifndef final_version
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if (pkt_len > 1518) {
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printk(KERN_WARNING "%s: Bogus packet size of %d (%#x).\n",
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dev->name, pkt_len, pkt_len);
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pkt_len = 1518;
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tp->stats.rx_length_errors++;
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}
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#endif
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/* Check if the packet is long enough to accept without copying
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to a minimally-sized skbuff. */
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if (pkt_len < tulip_rx_copybreak
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&& (skb = dev_alloc_skb(pkt_len + 2)) != NULL) {
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skb_reserve(skb, 2); /* 16 byte align the IP header */
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pci_dma_sync_single_for_cpu(tp->pdev,
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tp->rx_buffers[entry].mapping,
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pkt_len, PCI_DMA_FROMDEVICE);
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#if ! defined(__alpha__)
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skb_copy_to_linear_data(skb, tp->rx_buffers[entry].skb->data,
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pkt_len);
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skb_put(skb, pkt_len);
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#else
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memcpy(skb_put(skb, pkt_len),
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tp->rx_buffers[entry].skb->data,
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pkt_len);
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#endif
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pci_dma_sync_single_for_device(tp->pdev,
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tp->rx_buffers[entry].mapping,
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pkt_len, PCI_DMA_FROMDEVICE);
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} else { /* Pass up the skb already on the Rx ring. */
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char *temp = skb_put(skb = tp->rx_buffers[entry].skb,
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pkt_len);
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#ifndef final_version
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if (tp->rx_buffers[entry].mapping !=
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le32_to_cpu(tp->rx_ring[entry].buffer1)) {
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printk(KERN_ERR "%s: Internal fault: The skbuff addresses "
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"do not match in tulip_rx: %08x vs. %08llx %p / %p.\n",
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dev->name,
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le32_to_cpu(tp->rx_ring[entry].buffer1),
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(unsigned long long)tp->rx_buffers[entry].mapping,
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skb->head, temp);
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}
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#endif
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pci_unmap_single(tp->pdev, tp->rx_buffers[entry].mapping,
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PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
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tp->rx_buffers[entry].skb = NULL;
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tp->rx_buffers[entry].mapping = 0;
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}
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skb->protocol = eth_type_trans(skb, dev);
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netif_receive_skb(skb);
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dev->last_rx = jiffies;
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tp->stats.rx_packets++;
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tp->stats.rx_bytes += pkt_len;
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}
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received++;
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entry = (++tp->cur_rx) % RX_RING_SIZE;
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if (tp->cur_rx - tp->dirty_rx > RX_RING_SIZE/4)
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tulip_refill_rx(dev);
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}
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/* New ack strategy... irq does not ack Rx any longer
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hopefully this helps */
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/* Really bad things can happen here... If new packet arrives
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* and an irq arrives (tx or just due to occasionally unset
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* mask), it will be acked by irq handler, but new thread
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* is not scheduled. It is major hole in design.
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* No idea how to fix this if "playing with fire" will fail
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* tomorrow (night 011029). If it will not fail, we won
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* finally: amount of IO did not increase at all. */
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} while ((ioread32(tp->base_addr + CSR5) & RxIntr));
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done:
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#ifdef CONFIG_TULIP_NAPI_HW_MITIGATION
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/* We use this simplistic scheme for IM. It's proven by
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real life installations. We can have IM enabled
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continuesly but this would cause unnecessary latency.
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Unfortunely we can't use all the NET_RX_* feedback here.
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This would turn on IM for devices that is not contributing
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to backlog congestion with unnecessary latency.
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We monitor the device RX-ring and have:
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HW Interrupt Mitigation either ON or OFF.
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ON: More then 1 pkt received (per intr.) OR we are dropping
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OFF: Only 1 pkt received
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Note. We only use min and max (0, 15) settings from mit_table */
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if( tp->flags & HAS_INTR_MITIGATION) {
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if( received > 1 ) {
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if( ! tp->mit_on ) {
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tp->mit_on = 1;
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iowrite32(mit_table[MIT_TABLE], tp->base_addr + CSR11);
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}
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}
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else {
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if( tp->mit_on ) {
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tp->mit_on = 0;
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iowrite32(0, tp->base_addr + CSR11);
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}
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}
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}
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#endif /* CONFIG_TULIP_NAPI_HW_MITIGATION */
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dev->quota -= received;
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*budget -= received;
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tulip_refill_rx(dev);
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/* If RX ring is not full we are out of memory. */
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if (tp->rx_buffers[tp->dirty_rx % RX_RING_SIZE].skb == NULL) goto oom;
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/* Remove us from polling list and enable RX intr. */
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netif_rx_complete(dev);
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iowrite32(tulip_tbl[tp->chip_id].valid_intrs, tp->base_addr+CSR7);
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/* The last op happens after poll completion. Which means the following:
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* 1. it can race with disabling irqs in irq handler
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* 2. it can race with dise/enabling irqs in other poll threads
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* 3. if an irq raised after beginning loop, it will be immediately
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* triggered here.
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*
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* Summarizing: the logic results in some redundant irqs both
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* due to races in masking and due to too late acking of already
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* processed irqs. But it must not result in losing events.
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*/
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return 0;
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not_done:
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if (!received) {
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received = dev->quota; /* Not to happen */
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}
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dev->quota -= received;
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*budget -= received;
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if (tp->cur_rx - tp->dirty_rx > RX_RING_SIZE/2 ||
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tp->rx_buffers[tp->dirty_rx % RX_RING_SIZE].skb == NULL)
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tulip_refill_rx(dev);
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if (tp->rx_buffers[tp->dirty_rx % RX_RING_SIZE].skb == NULL) goto oom;
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return 1;
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oom: /* Executed with RX ints disabled */
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/* Start timer, stop polling, but do not enable rx interrupts. */
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mod_timer(&tp->oom_timer, jiffies+1);
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/* Think: timer_pending() was an explicit signature of bug.
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* Timer can be pending now but fired and completed
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* before we did netif_rx_complete(). See? We would lose it. */
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/* remove ourselves from the polling list */
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netif_rx_complete(dev);
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return 0;
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}
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#else /* CONFIG_TULIP_NAPI */
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static int tulip_rx(struct net_device *dev)
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{
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struct tulip_private *tp = netdev_priv(dev);
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int entry = tp->cur_rx % RX_RING_SIZE;
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int rx_work_limit = tp->dirty_rx + RX_RING_SIZE - tp->cur_rx;
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int received = 0;
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if (tulip_debug > 4)
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printk(KERN_DEBUG " In tulip_rx(), entry %d %8.8x.\n", entry,
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tp->rx_ring[entry].status);
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/* If we own the next entry, it is a new packet. Send it up. */
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while ( ! (tp->rx_ring[entry].status & cpu_to_le32(DescOwned))) {
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s32 status = le32_to_cpu(tp->rx_ring[entry].status);
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if (tulip_debug > 5)
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printk(KERN_DEBUG "%s: In tulip_rx(), entry %d %8.8x.\n",
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dev->name, entry, status);
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if (--rx_work_limit < 0)
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break;
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if ((status & 0x38008300) != 0x0300) {
|
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if ((status & 0x38000300) != 0x0300) {
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/* Ingore earlier buffers. */
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if ((status & 0xffff) != 0x7fff) {
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if (tulip_debug > 1)
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printk(KERN_WARNING "%s: Oversized Ethernet frame "
|
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"spanned multiple buffers, status %8.8x!\n",
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dev->name, status);
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tp->stats.rx_length_errors++;
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}
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} else if (status & RxDescFatalErr) {
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/* There was a fatal error. */
|
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if (tulip_debug > 2)
|
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printk(KERN_DEBUG "%s: Receive error, Rx status %8.8x.\n",
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dev->name, status);
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tp->stats.rx_errors++; /* end of a packet.*/
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if (status & 0x0890) tp->stats.rx_length_errors++;
|
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if (status & 0x0004) tp->stats.rx_frame_errors++;
|
|
if (status & 0x0002) tp->stats.rx_crc_errors++;
|
|
if (status & 0x0001) tp->stats.rx_fifo_errors++;
|
|
}
|
|
} else {
|
|
/* Omit the four octet CRC from the length. */
|
|
short pkt_len = ((status >> 16) & 0x7ff) - 4;
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struct sk_buff *skb;
|
|
|
|
#ifndef final_version
|
|
if (pkt_len > 1518) {
|
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printk(KERN_WARNING "%s: Bogus packet size of %d (%#x).\n",
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dev->name, pkt_len, pkt_len);
|
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pkt_len = 1518;
|
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tp->stats.rx_length_errors++;
|
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}
|
|
#endif
|
|
|
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/* Check if the packet is long enough to accept without copying
|
|
to a minimally-sized skbuff. */
|
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if (pkt_len < tulip_rx_copybreak
|
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&& (skb = dev_alloc_skb(pkt_len + 2)) != NULL) {
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skb_reserve(skb, 2); /* 16 byte align the IP header */
|
|
pci_dma_sync_single_for_cpu(tp->pdev,
|
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tp->rx_buffers[entry].mapping,
|
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pkt_len, PCI_DMA_FROMDEVICE);
|
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#if ! defined(__alpha__)
|
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skb_copy_to_linear_data(skb, tp->rx_buffers[entry].skb->data,
|
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pkt_len);
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skb_put(skb, pkt_len);
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#else
|
|
memcpy(skb_put(skb, pkt_len),
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tp->rx_buffers[entry].skb->data,
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pkt_len);
|
|
#endif
|
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pci_dma_sync_single_for_device(tp->pdev,
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tp->rx_buffers[entry].mapping,
|
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pkt_len, PCI_DMA_FROMDEVICE);
|
|
} else { /* Pass up the skb already on the Rx ring. */
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char *temp = skb_put(skb = tp->rx_buffers[entry].skb,
|
|
pkt_len);
|
|
|
|
#ifndef final_version
|
|
if (tp->rx_buffers[entry].mapping !=
|
|
le32_to_cpu(tp->rx_ring[entry].buffer1)) {
|
|
printk(KERN_ERR "%s: Internal fault: The skbuff addresses "
|
|
"do not match in tulip_rx: %08x vs. %Lx %p / %p.\n",
|
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dev->name,
|
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le32_to_cpu(tp->rx_ring[entry].buffer1),
|
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(long long)tp->rx_buffers[entry].mapping,
|
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skb->head, temp);
|
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}
|
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#endif
|
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|
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pci_unmap_single(tp->pdev, tp->rx_buffers[entry].mapping,
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PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
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|
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tp->rx_buffers[entry].skb = NULL;
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tp->rx_buffers[entry].mapping = 0;
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}
|
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skb->protocol = eth_type_trans(skb, dev);
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|
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netif_rx(skb);
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|
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dev->last_rx = jiffies;
|
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tp->stats.rx_packets++;
|
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tp->stats.rx_bytes += pkt_len;
|
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}
|
|
received++;
|
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entry = (++tp->cur_rx) % RX_RING_SIZE;
|
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}
|
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return received;
|
|
}
|
|
#endif /* CONFIG_TULIP_NAPI */
|
|
|
|
static inline unsigned int phy_interrupt (struct net_device *dev)
|
|
{
|
|
#ifdef __hppa__
|
|
struct tulip_private *tp = netdev_priv(dev);
|
|
int csr12 = ioread32(tp->base_addr + CSR12) & 0xff;
|
|
|
|
if (csr12 != tp->csr12_shadow) {
|
|
/* ack interrupt */
|
|
iowrite32(csr12 | 0x02, tp->base_addr + CSR12);
|
|
tp->csr12_shadow = csr12;
|
|
/* do link change stuff */
|
|
spin_lock(&tp->lock);
|
|
tulip_check_duplex(dev);
|
|
spin_unlock(&tp->lock);
|
|
/* clear irq ack bit */
|
|
iowrite32(csr12 & ~0x02, tp->base_addr + CSR12);
|
|
|
|
return 1;
|
|
}
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* The interrupt handler does all of the Rx thread work and cleans up
|
|
after the Tx thread. */
|
|
irqreturn_t tulip_interrupt(int irq, void *dev_instance)
|
|
{
|
|
struct net_device *dev = (struct net_device *)dev_instance;
|
|
struct tulip_private *tp = netdev_priv(dev);
|
|
void __iomem *ioaddr = tp->base_addr;
|
|
int csr5;
|
|
int missed;
|
|
int rx = 0;
|
|
int tx = 0;
|
|
int oi = 0;
|
|
int maxrx = RX_RING_SIZE;
|
|
int maxtx = TX_RING_SIZE;
|
|
int maxoi = TX_RING_SIZE;
|
|
#ifdef CONFIG_TULIP_NAPI
|
|
int rxd = 0;
|
|
#else
|
|
int entry;
|
|
#endif
|
|
unsigned int work_count = tulip_max_interrupt_work;
|
|
unsigned int handled = 0;
|
|
|
|
/* Let's see whether the interrupt really is for us */
|
|
csr5 = ioread32(ioaddr + CSR5);
|
|
|
|
if (tp->flags & HAS_PHY_IRQ)
|
|
handled = phy_interrupt (dev);
|
|
|
|
if ((csr5 & (NormalIntr|AbnormalIntr)) == 0)
|
|
return IRQ_RETVAL(handled);
|
|
|
|
tp->nir++;
|
|
|
|
do {
|
|
|
|
#ifdef CONFIG_TULIP_NAPI
|
|
|
|
if (!rxd && (csr5 & (RxIntr | RxNoBuf))) {
|
|
rxd++;
|
|
/* Mask RX intrs and add the device to poll list. */
|
|
iowrite32(tulip_tbl[tp->chip_id].valid_intrs&~RxPollInt, ioaddr + CSR7);
|
|
netif_rx_schedule(dev);
|
|
|
|
if (!(csr5&~(AbnormalIntr|NormalIntr|RxPollInt|TPLnkPass)))
|
|
break;
|
|
}
|
|
|
|
/* Acknowledge the interrupt sources we handle here ASAP
|
|
the poll function does Rx and RxNoBuf acking */
|
|
|
|
iowrite32(csr5 & 0x0001ff3f, ioaddr + CSR5);
|
|
|
|
#else
|
|
/* Acknowledge all of the current interrupt sources ASAP. */
|
|
iowrite32(csr5 & 0x0001ffff, ioaddr + CSR5);
|
|
|
|
|
|
if (csr5 & (RxIntr | RxNoBuf)) {
|
|
rx += tulip_rx(dev);
|
|
tulip_refill_rx(dev);
|
|
}
|
|
|
|
#endif /* CONFIG_TULIP_NAPI */
|
|
|
|
if (tulip_debug > 4)
|
|
printk(KERN_DEBUG "%s: interrupt csr5=%#8.8x new csr5=%#8.8x.\n",
|
|
dev->name, csr5, ioread32(ioaddr + CSR5));
|
|
|
|
|
|
if (csr5 & (TxNoBuf | TxDied | TxIntr | TimerInt)) {
|
|
unsigned int dirty_tx;
|
|
|
|
spin_lock(&tp->lock);
|
|
|
|
for (dirty_tx = tp->dirty_tx; tp->cur_tx - dirty_tx > 0;
|
|
dirty_tx++) {
|
|
int entry = dirty_tx % TX_RING_SIZE;
|
|
int status = le32_to_cpu(tp->tx_ring[entry].status);
|
|
|
|
if (status < 0)
|
|
break; /* It still has not been Txed */
|
|
|
|
/* Check for Rx filter setup frames. */
|
|
if (tp->tx_buffers[entry].skb == NULL) {
|
|
/* test because dummy frames not mapped */
|
|
if (tp->tx_buffers[entry].mapping)
|
|
pci_unmap_single(tp->pdev,
|
|
tp->tx_buffers[entry].mapping,
|
|
sizeof(tp->setup_frame),
|
|
PCI_DMA_TODEVICE);
|
|
continue;
|
|
}
|
|
|
|
if (status & 0x8000) {
|
|
/* There was an major error, log it. */
|
|
#ifndef final_version
|
|
if (tulip_debug > 1)
|
|
printk(KERN_DEBUG "%s: Transmit error, Tx status %8.8x.\n",
|
|
dev->name, status);
|
|
#endif
|
|
tp->stats.tx_errors++;
|
|
if (status & 0x4104) tp->stats.tx_aborted_errors++;
|
|
if (status & 0x0C00) tp->stats.tx_carrier_errors++;
|
|
if (status & 0x0200) tp->stats.tx_window_errors++;
|
|
if (status & 0x0002) tp->stats.tx_fifo_errors++;
|
|
if ((status & 0x0080) && tp->full_duplex == 0)
|
|
tp->stats.tx_heartbeat_errors++;
|
|
} else {
|
|
tp->stats.tx_bytes +=
|
|
tp->tx_buffers[entry].skb->len;
|
|
tp->stats.collisions += (status >> 3) & 15;
|
|
tp->stats.tx_packets++;
|
|
}
|
|
|
|
pci_unmap_single(tp->pdev, tp->tx_buffers[entry].mapping,
|
|
tp->tx_buffers[entry].skb->len,
|
|
PCI_DMA_TODEVICE);
|
|
|
|
/* Free the original skb. */
|
|
dev_kfree_skb_irq(tp->tx_buffers[entry].skb);
|
|
tp->tx_buffers[entry].skb = NULL;
|
|
tp->tx_buffers[entry].mapping = 0;
|
|
tx++;
|
|
}
|
|
|
|
#ifndef final_version
|
|
if (tp->cur_tx - dirty_tx > TX_RING_SIZE) {
|
|
printk(KERN_ERR "%s: Out-of-sync dirty pointer, %d vs. %d.\n",
|
|
dev->name, dirty_tx, tp->cur_tx);
|
|
dirty_tx += TX_RING_SIZE;
|
|
}
|
|
#endif
|
|
|
|
if (tp->cur_tx - dirty_tx < TX_RING_SIZE - 2)
|
|
netif_wake_queue(dev);
|
|
|
|
tp->dirty_tx = dirty_tx;
|
|
if (csr5 & TxDied) {
|
|
if (tulip_debug > 2)
|
|
printk(KERN_WARNING "%s: The transmitter stopped."
|
|
" CSR5 is %x, CSR6 %x, new CSR6 %x.\n",
|
|
dev->name, csr5, ioread32(ioaddr + CSR6), tp->csr6);
|
|
tulip_restart_rxtx(tp);
|
|
}
|
|
spin_unlock(&tp->lock);
|
|
}
|
|
|
|
/* Log errors. */
|
|
if (csr5 & AbnormalIntr) { /* Abnormal error summary bit. */
|
|
if (csr5 == 0xffffffff)
|
|
break;
|
|
if (csr5 & TxJabber) tp->stats.tx_errors++;
|
|
if (csr5 & TxFIFOUnderflow) {
|
|
if ((tp->csr6 & 0xC000) != 0xC000)
|
|
tp->csr6 += 0x4000; /* Bump up the Tx threshold */
|
|
else
|
|
tp->csr6 |= 0x00200000; /* Store-n-forward. */
|
|
/* Restart the transmit process. */
|
|
tulip_restart_rxtx(tp);
|
|
iowrite32(0, ioaddr + CSR1);
|
|
}
|
|
if (csr5 & (RxDied | RxNoBuf)) {
|
|
if (tp->flags & COMET_MAC_ADDR) {
|
|
iowrite32(tp->mc_filter[0], ioaddr + 0xAC);
|
|
iowrite32(tp->mc_filter[1], ioaddr + 0xB0);
|
|
}
|
|
}
|
|
if (csr5 & RxDied) { /* Missed a Rx frame. */
|
|
tp->stats.rx_missed_errors += ioread32(ioaddr + CSR8) & 0xffff;
|
|
tp->stats.rx_errors++;
|
|
tulip_start_rxtx(tp);
|
|
}
|
|
/*
|
|
* NB: t21142_lnk_change() does a del_timer_sync(), so be careful if this
|
|
* call is ever done under the spinlock
|
|
*/
|
|
if (csr5 & (TPLnkPass | TPLnkFail | 0x08000000)) {
|
|
if (tp->link_change)
|
|
(tp->link_change)(dev, csr5);
|
|
}
|
|
if (csr5 & SystemError) {
|
|
int error = (csr5 >> 23) & 7;
|
|
/* oops, we hit a PCI error. The code produced corresponds
|
|
* to the reason:
|
|
* 0 - parity error
|
|
* 1 - master abort
|
|
* 2 - target abort
|
|
* Note that on parity error, we should do a software reset
|
|
* of the chip to get it back into a sane state (according
|
|
* to the 21142/3 docs that is).
|
|
* -- rmk
|
|
*/
|
|
printk(KERN_ERR "%s: (%lu) System Error occurred (%d)\n",
|
|
dev->name, tp->nir, error);
|
|
}
|
|
/* Clear all error sources, included undocumented ones! */
|
|
iowrite32(0x0800f7ba, ioaddr + CSR5);
|
|
oi++;
|
|
}
|
|
if (csr5 & TimerInt) {
|
|
|
|
if (tulip_debug > 2)
|
|
printk(KERN_ERR "%s: Re-enabling interrupts, %8.8x.\n",
|
|
dev->name, csr5);
|
|
iowrite32(tulip_tbl[tp->chip_id].valid_intrs, ioaddr + CSR7);
|
|
tp->ttimer = 0;
|
|
oi++;
|
|
}
|
|
if (tx > maxtx || rx > maxrx || oi > maxoi) {
|
|
if (tulip_debug > 1)
|
|
printk(KERN_WARNING "%s: Too much work during an interrupt, "
|
|
"csr5=0x%8.8x. (%lu) (%d,%d,%d)\n", dev->name, csr5, tp->nir, tx, rx, oi);
|
|
|
|
/* Acknowledge all interrupt sources. */
|
|
iowrite32(0x8001ffff, ioaddr + CSR5);
|
|
if (tp->flags & HAS_INTR_MITIGATION) {
|
|
/* Josip Loncaric at ICASE did extensive experimentation
|
|
to develop a good interrupt mitigation setting.*/
|
|
iowrite32(0x8b240000, ioaddr + CSR11);
|
|
} else if (tp->chip_id == LC82C168) {
|
|
/* the LC82C168 doesn't have a hw timer.*/
|
|
iowrite32(0x00, ioaddr + CSR7);
|
|
mod_timer(&tp->timer, RUN_AT(HZ/50));
|
|
} else {
|
|
/* Mask all interrupting sources, set timer to
|
|
re-enable. */
|
|
iowrite32(((~csr5) & 0x0001ebef) | AbnormalIntr | TimerInt, ioaddr + CSR7);
|
|
iowrite32(0x0012, ioaddr + CSR11);
|
|
}
|
|
break;
|
|
}
|
|
|
|
work_count--;
|
|
if (work_count == 0)
|
|
break;
|
|
|
|
csr5 = ioread32(ioaddr + CSR5);
|
|
|
|
#ifdef CONFIG_TULIP_NAPI
|
|
if (rxd)
|
|
csr5 &= ~RxPollInt;
|
|
} while ((csr5 & (TxNoBuf |
|
|
TxDied |
|
|
TxIntr |
|
|
TimerInt |
|
|
/* Abnormal intr. */
|
|
RxDied |
|
|
TxFIFOUnderflow |
|
|
TxJabber |
|
|
TPLnkFail |
|
|
SystemError )) != 0);
|
|
#else
|
|
} while ((csr5 & (NormalIntr|AbnormalIntr)) != 0);
|
|
|
|
tulip_refill_rx(dev);
|
|
|
|
/* check if the card is in suspend mode */
|
|
entry = tp->dirty_rx % RX_RING_SIZE;
|
|
if (tp->rx_buffers[entry].skb == NULL) {
|
|
if (tulip_debug > 1)
|
|
printk(KERN_WARNING "%s: in rx suspend mode: (%lu) (tp->cur_rx = %u, ttimer = %d, rx = %d) go/stay in suspend mode\n", dev->name, tp->nir, tp->cur_rx, tp->ttimer, rx);
|
|
if (tp->chip_id == LC82C168) {
|
|
iowrite32(0x00, ioaddr + CSR7);
|
|
mod_timer(&tp->timer, RUN_AT(HZ/50));
|
|
} else {
|
|
if (tp->ttimer == 0 || (ioread32(ioaddr + CSR11) & 0xffff) == 0) {
|
|
if (tulip_debug > 1)
|
|
printk(KERN_WARNING "%s: in rx suspend mode: (%lu) set timer\n", dev->name, tp->nir);
|
|
iowrite32(tulip_tbl[tp->chip_id].valid_intrs | TimerInt,
|
|
ioaddr + CSR7);
|
|
iowrite32(TimerInt, ioaddr + CSR5);
|
|
iowrite32(12, ioaddr + CSR11);
|
|
tp->ttimer = 1;
|
|
}
|
|
}
|
|
}
|
|
#endif /* CONFIG_TULIP_NAPI */
|
|
|
|
if ((missed = ioread32(ioaddr + CSR8) & 0x1ffff)) {
|
|
tp->stats.rx_dropped += missed & 0x10000 ? 0x10000 : missed;
|
|
}
|
|
|
|
if (tulip_debug > 4)
|
|
printk(KERN_DEBUG "%s: exiting interrupt, csr5=%#4.4x.\n",
|
|
dev->name, ioread32(ioaddr + CSR5));
|
|
|
|
return IRQ_HANDLED;
|
|
}
|