James Jones 176ada03e3 drm/nouveau/mmu: Add correct turing page kinds ... Turing introduced a new simplified page kind scheme, reducing the number of possible page kinds from 256 to 16. It also is the first NVIDIA GPU in which the highest possible page kind value is not reserved as an "invalid" page kind. To address this, the invalid page kind is made an explicit property of the MMU HAL, and a new table of page kinds is added to the tu102 MMU HAL. One hardware change not addressed here is that 0x00 is technically no longer a supported page kind, and pitch surfaces are instead intended to share the block-linear generic page kind 0x06. However, because that will be a rather invasive change to nouveau and 0x00 still works fine in practice on Turing hardware, addressing this new behavior is deferred. Signed-off-by: James Jones <jajones@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>		2020-01-15 10:49:59 +10:00
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nvif	drm/nouveau/mmu: Add correct turing page kinds	2020-01-15 10:49:59 +10:00
nvkm	drm/nouveau/ltc/gp10b: Add custom L2 cache implementation	2020-01-15 10:49:59 +10:00