90098efacc
We stopped re-applying the GT workarounds after engine reset since commit59b449d5c8("drm/i915: Split out functions for different kinds of workarounds"). Issue with this is that some of the GT workarounds live in the MMIO space which gets lost during engine resets. So far the registers in 0x2xxx and 0xbxxx address range have been identified to be affected. This losing of applied workarounds has obvious negative effects and can even lead to hard system hangs (see the linked Bugzilla). Rather than just restoring this re-application, because we have also observed that it is not safe to just re-write all GT workarounds after engine resets (GPU might be live and weird hardware states can happen), we introduce a new class of per-engine workarounds and move only the affected GT workarounds over. Using the framework introduced in the previous patch, we therefore after engine reset, re-apply only the workarounds living in the affected MMIO address ranges. v2: * Move Wa_1406609255:icl to engine workarounds as well. * Rename API. (Chris Wilson) * Drop redundant IS_KABYLAKE. (Chris Wilson) * Re-order engine wa/ init so latest platforms are first. (Rodrigo Vivi) Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Bugzilla: https://bugzilla.freedesktop.org/show_bug.cgi?id=107945 Fixes:59b449d5c8("drm/i915: Split out functions for different kinds of workarounds") Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: intel-gfx@lists.freedesktop.org Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20181203133341.10258-1-tvrtko.ursulin@linux.intel.com (cherry picked from commit4a15c75c42) Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
42 lines
925 B
C
42 lines
925 B
C
/*
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* SPDX-License-Identifier: MIT
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*
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* Copyright © 2014-2018 Intel Corporation
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*/
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#ifndef _I915_WORKAROUNDS_H_
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#define _I915_WORKAROUNDS_H_
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#include <linux/slab.h>
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struct i915_wa {
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i915_reg_t reg;
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u32 mask;
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u32 val;
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};
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struct i915_wa_list {
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const char *name;
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struct i915_wa *list;
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unsigned int count;
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};
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static inline void intel_wa_list_free(struct i915_wa_list *wal)
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{
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kfree(wal->list);
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memset(wal, 0, sizeof(*wal));
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}
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int intel_ctx_workarounds_init(struct drm_i915_private *dev_priv);
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int intel_ctx_workarounds_emit(struct i915_request *rq);
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void intel_gt_init_workarounds(struct drm_i915_private *dev_priv);
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void intel_gt_apply_workarounds(struct drm_i915_private *dev_priv);
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void intel_whitelist_workarounds_apply(struct intel_engine_cs *engine);
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void intel_engine_init_workarounds(struct intel_engine_cs *engine);
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void intel_engine_apply_workarounds(struct intel_engine_cs *engine);
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#endif
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