Jani Nikula 79ac2b1bc9 drm/i915/dg2: configure TRANS_DP2_CTL for DP 2.0 ...

Set the DP 2.0 128b/132b channel encoding for UHBR rates.

v2: Fix UHBR port clock check, use intel_dp_is_uhbr()

Bspec: 54128
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/c88b08d80a96d1229ae941b296590633be4d8711.1631191763.git.jani.nikula@intel.com

2021-09-20 18:46:40 +03:00

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drm

drm/i915/dg2: configure TRANS_DP2_CTL for DP 2.0

2021-09-20 18:46:40 +03:00

host1x

gpu: host1x: debug: Dump DMASTART and DMAEND register

2021-08-13 18:23:32 +02:00

ipu-v3

Merge tag 'irq-core-2021-08-30' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

2021-08-30 14:38:37 -07:00

trace

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vga

vgaarb: don't pass a cookie to vga_client_register

2021-07-21 10:29:10 +02:00

Makefile

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