forked from Minki/linux
62c592edea
The following patch fixes two warnings in arch/ppc/syslib/m8xx_setup.c Signed-off-by: Marcelo Tosatti <marcelo.tosatti@cyclades.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
430 lines
11 KiB
C
430 lines
11 KiB
C
/*
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* arch/ppc/kernel/setup.c
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*
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* Copyright (C) 1995 Linus Torvalds
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* Adapted from 'alpha' version by Gary Thomas
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* Modified by Cort Dougan (cort@cs.nmt.edu)
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* Modified for MBX using prep/chrp/pmac functions by Dan (dmalek@jlc.net)
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* Further modified for generic 8xx by Dan.
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*/
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/*
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* bootup setup stuff..
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*/
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#include <linux/config.h>
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/stddef.h>
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#include <linux/unistd.h>
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#include <linux/ptrace.h>
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#include <linux/slab.h>
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#include <linux/user.h>
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#include <linux/a.out.h>
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#include <linux/tty.h>
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#include <linux/major.h>
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#include <linux/interrupt.h>
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#include <linux/reboot.h>
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#include <linux/init.h>
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#include <linux/initrd.h>
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#include <linux/ioport.h>
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#include <linux/bootmem.h>
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#include <linux/seq_file.h>
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#include <linux/root_dev.h>
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#include <asm/mmu.h>
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#include <asm/reg.h>
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#include <asm/residual.h>
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#include <asm/io.h>
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#include <asm/pgtable.h>
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#include <asm/mpc8xx.h>
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#include <asm/8xx_immap.h>
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#include <asm/machdep.h>
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#include <asm/bootinfo.h>
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#include <asm/time.h>
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#include <asm/xmon.h>
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#include "ppc8xx_pic.h"
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static int m8xx_set_rtc_time(unsigned long time);
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static unsigned long m8xx_get_rtc_time(void);
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void m8xx_calibrate_decr(void);
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unsigned char __res[sizeof(bd_t)];
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extern void m8xx_ide_init(void);
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extern unsigned long find_available_memory(void);
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extern void m8xx_cpm_reset(void);
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extern void m8xx_wdt_handler_install(bd_t *bp);
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extern void rpxfb_alloc_pages(void);
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extern void cpm_interrupt_init(void);
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void __attribute__ ((weak))
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board_init(void)
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{
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}
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void __init
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m8xx_setup_arch(void)
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{
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/* Reset the Communication Processor Module.
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*/
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m8xx_cpm_reset();
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#ifdef CONFIG_FB_RPX
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rpxfb_alloc_pages();
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#endif
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#ifdef notdef
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ROOT_DEV = Root_HDA1; /* hda1 */
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#endif
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#ifdef CONFIG_BLK_DEV_INITRD
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#if 0
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ROOT_DEV = Root_FD0; /* floppy */
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rd_prompt = 1;
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rd_doload = 1;
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rd_image_start = 0;
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#endif
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#if 0 /* XXX this may need to be updated for the new bootmem stuff,
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or possibly just deleted (see set_phys_avail() in init.c).
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- paulus. */
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/* initrd_start and size are setup by boot/head.S and kernel/head.S */
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if ( initrd_start )
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{
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if (initrd_end > *memory_end_p)
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{
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printk("initrd extends beyond end of memory "
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"(0x%08lx > 0x%08lx)\ndisabling initrd\n",
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initrd_end,*memory_end_p);
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initrd_start = 0;
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}
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}
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#endif
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#endif
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board_init();
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}
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void
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abort(void)
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{
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#ifdef CONFIG_XMON
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xmon(0);
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#endif
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machine_restart(NULL);
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/* not reached */
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for (;;);
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}
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/* A place holder for time base interrupts, if they are ever enabled. */
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irqreturn_t timebase_interrupt(int irq, void * dev, struct pt_regs * regs)
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{
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printk ("timebase_interrupt()\n");
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return IRQ_HANDLED;
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}
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static struct irqaction tbint_irqaction = {
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.handler = timebase_interrupt,
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.mask = CPU_MASK_NONE,
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.name = "tbint",
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};
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/* The decrementer counts at the system (internal) clock frequency divided by
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* sixteen, or external oscillator divided by four. We force the processor
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* to use system clock divided by sixteen.
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*/
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void __init m8xx_calibrate_decr(void)
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{
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bd_t *binfo = (bd_t *)__res;
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int freq, fp, divisor;
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/* Unlock the SCCR. */
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((volatile immap_t *)IMAP_ADDR)->im_clkrstk.cark_sccrk = ~KAPWR_KEY;
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((volatile immap_t *)IMAP_ADDR)->im_clkrstk.cark_sccrk = KAPWR_KEY;
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/* Force all 8xx processors to use divide by 16 processor clock. */
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((volatile immap_t *)IMAP_ADDR)->im_clkrst.car_sccr |= 0x02000000;
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/* Processor frequency is MHz.
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* The value 'fp' is the number of decrementer ticks per second.
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*/
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fp = binfo->bi_intfreq / 16;
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freq = fp*60; /* try to make freq/1e6 an integer */
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divisor = 60;
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printk("Decrementer Frequency = %d/%d\n", freq, divisor);
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tb_ticks_per_jiffy = freq / HZ / divisor;
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tb_to_us = mulhwu_scale_factor(freq / divisor, 1000000);
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/* Perform some more timer/timebase initialization. This used
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* to be done elsewhere, but other changes caused it to get
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* called more than once....that is a bad thing.
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*
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* First, unlock all of the registers we are going to modify.
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* To protect them from corruption during power down, registers
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* that are maintained by keep alive power are "locked". To
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* modify these registers we have to write the key value to
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* the key location associated with the register.
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* Some boards power up with these unlocked, while others
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* are locked. Writing anything (including the unlock code?)
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* to the unlocked registers will lock them again. So, here
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* we guarantee the registers are locked, then we unlock them
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* for our use.
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*/
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((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_tbscrk = ~KAPWR_KEY;
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((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_rtcsck = ~KAPWR_KEY;
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((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_tbk = ~KAPWR_KEY;
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((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_tbscrk = KAPWR_KEY;
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((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_rtcsck = KAPWR_KEY;
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((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_tbk = KAPWR_KEY;
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/* Disable the RTC one second and alarm interrupts. */
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((volatile immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc &=
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~(RTCSC_SIE | RTCSC_ALE);
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/* Enable the RTC */
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((volatile immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc |=
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(RTCSC_RTF | RTCSC_RTE);
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/* Enabling the decrementer also enables the timebase interrupts
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* (or from the other point of view, to get decrementer interrupts
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* we have to enable the timebase). The decrementer interrupt
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* is wired into the vector table, nothing to do here for that.
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*/
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((volatile immap_t *)IMAP_ADDR)->im_sit.sit_tbscr =
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((mk_int_int_mask(DEC_INTERRUPT) << 8) |
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(TBSCR_TBF | TBSCR_TBE));
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if (setup_irq(DEC_INTERRUPT, &tbint_irqaction))
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panic("Could not allocate timer IRQ!");
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#ifdef CONFIG_8xx_WDT
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/* Install watchdog timer handler early because it might be
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* already enabled by the bootloader
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*/
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m8xx_wdt_handler_install(binfo);
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#endif
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}
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/* The RTC on the MPC8xx is an internal register.
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* We want to protect this during power down, so we need to unlock,
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* modify, and re-lock.
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*/
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static int
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m8xx_set_rtc_time(unsigned long time)
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{
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((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_rtck = KAPWR_KEY;
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((volatile immap_t *)IMAP_ADDR)->im_sit.sit_rtc = time;
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((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_rtck = ~KAPWR_KEY;
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return(0);
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}
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static unsigned long
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m8xx_get_rtc_time(void)
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{
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/* Get time from the RTC. */
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return((unsigned long)(((immap_t *)IMAP_ADDR)->im_sit.sit_rtc));
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}
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static void
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m8xx_restart(char *cmd)
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{
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__volatile__ unsigned char dummy;
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local_irq_disable();
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((immap_t *)IMAP_ADDR)->im_clkrst.car_plprcr |= 0x00000080;
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/* Clear the ME bit in MSR to cause checkstop on machine check
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*/
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mtmsr(mfmsr() & ~0x1000);
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dummy = ((immap_t *)IMAP_ADDR)->im_clkrst.res[0];
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printk("Restart failed\n");
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while(1);
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}
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static void
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m8xx_power_off(void)
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{
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m8xx_restart(NULL);
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}
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static void
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m8xx_halt(void)
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{
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m8xx_restart(NULL);
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}
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static int
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m8xx_show_percpuinfo(struct seq_file *m, int i)
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{
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bd_t *bp;
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bp = (bd_t *)__res;
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seq_printf(m, "clock\t\t: %uMHz\n"
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"bus clock\t: %uMHz\n",
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bp->bi_intfreq / 1000000,
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bp->bi_busfreq / 1000000);
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return 0;
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}
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#ifdef CONFIG_PCI
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static struct irqaction mbx_i8259_irqaction = {
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.handler = mbx_i8259_action,
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.mask = CPU_MASK_NONE,
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.name = "i8259 cascade",
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};
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#endif
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/* Initialize the internal interrupt controller. The number of
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* interrupts supported can vary with the processor type, and the
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* 82xx family can have up to 64.
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* External interrupts can be either edge or level triggered, and
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* need to be initialized by the appropriate driver.
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*/
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static void __init
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m8xx_init_IRQ(void)
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{
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int i;
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for (i = SIU_IRQ_OFFSET ; i < SIU_IRQ_OFFSET + NR_SIU_INTS ; i++)
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irq_desc[i].handler = &ppc8xx_pic;
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cpm_interrupt_init();
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#if defined(CONFIG_PCI)
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for (i = I8259_IRQ_OFFSET ; i < I8259_IRQ_OFFSET + NR_8259_INTS ; i++)
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irq_desc[i].handler = &i8259_pic;
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i8259_pic_irq_offset = I8259_IRQ_OFFSET;
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i8259_init(0);
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/* The i8259 cascade interrupt must be level sensitive. */
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((immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel &=
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~(0x80000000 >> ISA_BRIDGE_INT);
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if (setup_irq(ISA_BRIDGE_INT, &mbx_i8259_irqaction))
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enable_irq(ISA_BRIDGE_INT);
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#endif /* CONFIG_PCI */
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}
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/* -------------------------------------------------------------------- */
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/*
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* This is a big hack right now, but it may turn into something real
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* someday.
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*
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* For the 8xx boards (at this time anyway), there is nothing to initialize
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* associated the PROM. Rather than include all of the prom.c
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* functions in the image just to get prom_init, all we really need right
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* now is the initialization of the physical memory region.
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*/
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static unsigned long __init
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m8xx_find_end_of_memory(void)
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{
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bd_t *binfo;
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extern unsigned char __res[];
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binfo = (bd_t *)__res;
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return binfo->bi_memsize;
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}
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/*
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* Now map in some of the I/O space that is generically needed
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* or shared with multiple devices.
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* All of this fits into the same 4Mbyte region, so it only
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* requires one page table page. (or at least it used to -- paulus)
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*/
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static void __init
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m8xx_map_io(void)
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{
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io_block_mapping(IMAP_ADDR, IMAP_ADDR, IMAP_SIZE, _PAGE_IO);
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#ifdef CONFIG_MBX
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io_block_mapping(NVRAM_ADDR, NVRAM_ADDR, NVRAM_SIZE, _PAGE_IO);
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io_block_mapping(MBX_CSR_ADDR, MBX_CSR_ADDR, MBX_CSR_SIZE, _PAGE_IO);
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io_block_mapping(PCI_CSR_ADDR, PCI_CSR_ADDR, PCI_CSR_SIZE, _PAGE_IO);
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/* Map some of the PCI/ISA I/O space to get the IDE interface.
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*/
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io_block_mapping(PCI_ISA_IO_ADDR, PCI_ISA_IO_ADDR, 0x4000, _PAGE_IO);
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io_block_mapping(PCI_IDE_ADDR, PCI_IDE_ADDR, 0x4000, _PAGE_IO);
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#endif
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#if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC)
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io_block_mapping(RPX_CSR_ADDR, RPX_CSR_ADDR, RPX_CSR_SIZE, _PAGE_IO);
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#if !defined(CONFIG_PCI)
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io_block_mapping(_IO_BASE,_IO_BASE,_IO_BASE_SIZE, _PAGE_IO);
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#endif
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#endif
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#if defined(CONFIG_HTDMSOUND) || defined(CONFIG_RPXTOUCH) || defined(CONFIG_FB_RPX)
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io_block_mapping(HIOX_CSR_ADDR, HIOX_CSR_ADDR, HIOX_CSR_SIZE, _PAGE_IO);
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#endif
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#ifdef CONFIG_FADS
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io_block_mapping(BCSR_ADDR, BCSR_ADDR, BCSR_SIZE, _PAGE_IO);
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#endif
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#ifdef CONFIG_PCI
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io_block_mapping(PCI_CSR_ADDR, PCI_CSR_ADDR, PCI_CSR_SIZE, _PAGE_IO);
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#endif
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#if defined(CONFIG_NETTA)
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io_block_mapping(_IO_BASE,_IO_BASE,_IO_BASE_SIZE, _PAGE_IO);
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#endif
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}
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void __init
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platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
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unsigned long r6, unsigned long r7)
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{
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parse_bootinfo(find_bootinfo());
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if ( r3 )
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memcpy( (void *)__res,(void *)(r3+KERNELBASE), sizeof(bd_t) );
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#ifdef CONFIG_PCI
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m8xx_setup_pci_ptrs();
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#endif
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#ifdef CONFIG_BLK_DEV_INITRD
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/* take care of initrd if we have one */
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if ( r4 )
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{
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initrd_start = r4 + KERNELBASE;
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initrd_end = r5 + KERNELBASE;
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}
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#endif /* CONFIG_BLK_DEV_INITRD */
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/* take care of cmd line */
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if ( r6 )
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{
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*(char *)(r7+KERNELBASE) = 0;
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strcpy(cmd_line, (char *)(r6+KERNELBASE));
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}
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ppc_md.setup_arch = m8xx_setup_arch;
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ppc_md.show_percpuinfo = m8xx_show_percpuinfo;
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ppc_md.irq_canonicalize = NULL;
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ppc_md.init_IRQ = m8xx_init_IRQ;
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ppc_md.get_irq = m8xx_get_irq;
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ppc_md.init = NULL;
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ppc_md.restart = m8xx_restart;
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ppc_md.power_off = m8xx_power_off;
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ppc_md.halt = m8xx_halt;
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ppc_md.time_init = NULL;
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ppc_md.set_rtc_time = m8xx_set_rtc_time;
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ppc_md.get_rtc_time = m8xx_get_rtc_time;
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ppc_md.calibrate_decr = m8xx_calibrate_decr;
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ppc_md.find_end_of_memory = m8xx_find_end_of_memory;
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ppc_md.setup_io_mappings = m8xx_map_io;
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#if defined(CONFIG_BLK_DEV_MPC8xx_IDE)
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m8xx_ide_init();
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#endif
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}
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