forked from Minki/linux
497888cf69
All these are instances of #define NAME value; or #define NAME(params_opt) value; These of course fail to build when used in contexts like if(foo $OP NAME) while(bar $OP NAME) and may silently generate the wrong code in contexts such as foo = NAME + 1; /* foo = value; + 1; */ bar = NAME - 1; /* bar = value; - 1; */ baz = NAME & quux; /* baz = value; & quux; */ Reported on comp.lang.c, Message-ID: <ab0d55fe-25e5-482b-811e-c475aa6065c3@c29g2000yqd.googlegroups.com> Initial analysis of the dangers provided by Keith Thompson in that thread. There are many more instances of more complicated macros having unnecessary trailing semicolons, but this pile seems to be all of the cases of simple values suffering from the problem. (Thus things that are likely to be found in one of the contexts above, more complicated ones aren't.) Signed-off-by: Phil Carmody <ext-phil.2.carmody@nokia.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
242 lines
7.8 KiB
C
242 lines
7.8 KiB
C
#ifndef _PARISC_DMA_MAPPING_H
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#define _PARISC_DMA_MAPPING_H
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#include <linux/mm.h>
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#include <asm/cacheflush.h>
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#include <asm/scatterlist.h>
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/* See Documentation/PCI/PCI-DMA-mapping.txt */
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struct hppa_dma_ops {
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int (*dma_supported)(struct device *dev, u64 mask);
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void *(*alloc_consistent)(struct device *dev, size_t size, dma_addr_t *iova, gfp_t flag);
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void *(*alloc_noncoherent)(struct device *dev, size_t size, dma_addr_t *iova, gfp_t flag);
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void (*free_consistent)(struct device *dev, size_t size, void *vaddr, dma_addr_t iova);
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dma_addr_t (*map_single)(struct device *dev, void *addr, size_t size, enum dma_data_direction direction);
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void (*unmap_single)(struct device *dev, dma_addr_t iova, size_t size, enum dma_data_direction direction);
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int (*map_sg)(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction direction);
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void (*unmap_sg)(struct device *dev, struct scatterlist *sg, int nhwents, enum dma_data_direction direction);
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void (*dma_sync_single_for_cpu)(struct device *dev, dma_addr_t iova, unsigned long offset, size_t size, enum dma_data_direction direction);
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void (*dma_sync_single_for_device)(struct device *dev, dma_addr_t iova, unsigned long offset, size_t size, enum dma_data_direction direction);
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void (*dma_sync_sg_for_cpu)(struct device *dev, struct scatterlist *sg, int nelems, enum dma_data_direction direction);
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void (*dma_sync_sg_for_device)(struct device *dev, struct scatterlist *sg, int nelems, enum dma_data_direction direction);
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};
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/*
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** We could live without the hppa_dma_ops indirection if we didn't want
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** to support 4 different coherent dma models with one binary (they will
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** someday be loadable modules):
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** I/O MMU consistent method dma_sync behavior
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** ============= ====================== =======================
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** a) PA-7x00LC uncachable host memory flush/purge
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** b) U2/Uturn cachable host memory NOP
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** c) Ike/Astro cachable host memory NOP
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** d) EPIC/SAGA memory on EPIC/SAGA flush/reset DMA channel
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**
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** PA-7[13]00LC processors have a GSC bus interface and no I/O MMU.
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**
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** Systems (eg PCX-T workstations) that don't fall into the above
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** categories will need to modify the needed drivers to perform
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** flush/purge and allocate "regular" cacheable pages for everything.
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*/
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#ifdef CONFIG_PA11
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extern struct hppa_dma_ops pcxl_dma_ops;
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extern struct hppa_dma_ops pcx_dma_ops;
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#endif
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extern struct hppa_dma_ops *hppa_dma_ops;
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static inline void *
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dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
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gfp_t flag)
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{
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return hppa_dma_ops->alloc_consistent(dev, size, dma_handle, flag);
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}
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static inline void *
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dma_alloc_noncoherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
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gfp_t flag)
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{
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return hppa_dma_ops->alloc_noncoherent(dev, size, dma_handle, flag);
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}
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static inline void
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dma_free_coherent(struct device *dev, size_t size,
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void *vaddr, dma_addr_t dma_handle)
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{
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hppa_dma_ops->free_consistent(dev, size, vaddr, dma_handle);
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}
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static inline void
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dma_free_noncoherent(struct device *dev, size_t size,
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void *vaddr, dma_addr_t dma_handle)
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{
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hppa_dma_ops->free_consistent(dev, size, vaddr, dma_handle);
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}
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static inline dma_addr_t
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dma_map_single(struct device *dev, void *ptr, size_t size,
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enum dma_data_direction direction)
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{
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return hppa_dma_ops->map_single(dev, ptr, size, direction);
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}
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static inline void
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dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
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enum dma_data_direction direction)
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{
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hppa_dma_ops->unmap_single(dev, dma_addr, size, direction);
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}
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static inline int
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dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
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enum dma_data_direction direction)
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{
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return hppa_dma_ops->map_sg(dev, sg, nents, direction);
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}
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static inline void
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dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
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enum dma_data_direction direction)
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{
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hppa_dma_ops->unmap_sg(dev, sg, nhwentries, direction);
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}
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static inline dma_addr_t
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dma_map_page(struct device *dev, struct page *page, unsigned long offset,
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size_t size, enum dma_data_direction direction)
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{
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return dma_map_single(dev, (page_address(page) + (offset)), size, direction);
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}
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static inline void
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dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
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enum dma_data_direction direction)
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{
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dma_unmap_single(dev, dma_address, size, direction);
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}
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static inline void
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dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
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enum dma_data_direction direction)
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{
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if(hppa_dma_ops->dma_sync_single_for_cpu)
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hppa_dma_ops->dma_sync_single_for_cpu(dev, dma_handle, 0, size, direction);
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}
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static inline void
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dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,
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enum dma_data_direction direction)
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{
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if(hppa_dma_ops->dma_sync_single_for_device)
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hppa_dma_ops->dma_sync_single_for_device(dev, dma_handle, 0, size, direction);
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}
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static inline void
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dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
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unsigned long offset, size_t size,
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enum dma_data_direction direction)
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{
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if(hppa_dma_ops->dma_sync_single_for_cpu)
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hppa_dma_ops->dma_sync_single_for_cpu(dev, dma_handle, offset, size, direction);
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}
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static inline void
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dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
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unsigned long offset, size_t size,
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enum dma_data_direction direction)
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{
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if(hppa_dma_ops->dma_sync_single_for_device)
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hppa_dma_ops->dma_sync_single_for_device(dev, dma_handle, offset, size, direction);
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}
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static inline void
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dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
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enum dma_data_direction direction)
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{
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if(hppa_dma_ops->dma_sync_sg_for_cpu)
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hppa_dma_ops->dma_sync_sg_for_cpu(dev, sg, nelems, direction);
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}
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static inline void
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dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
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enum dma_data_direction direction)
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{
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if(hppa_dma_ops->dma_sync_sg_for_device)
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hppa_dma_ops->dma_sync_sg_for_device(dev, sg, nelems, direction);
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}
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static inline int
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dma_supported(struct device *dev, u64 mask)
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{
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return hppa_dma_ops->dma_supported(dev, mask);
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}
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static inline int
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dma_set_mask(struct device *dev, u64 mask)
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{
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if(!dev->dma_mask || !dma_supported(dev, mask))
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return -EIO;
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*dev->dma_mask = mask;
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return 0;
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}
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static inline void
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dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction)
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{
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if(hppa_dma_ops->dma_sync_single_for_cpu)
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flush_kernel_dcache_range((unsigned long)vaddr, size);
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}
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static inline void *
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parisc_walk_tree(struct device *dev)
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{
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struct device *otherdev;
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if(likely(dev->platform_data != NULL))
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return dev->platform_data;
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/* OK, just traverse the bus to find it */
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for(otherdev = dev->parent; otherdev;
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otherdev = otherdev->parent) {
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if(otherdev->platform_data) {
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dev->platform_data = otherdev->platform_data;
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break;
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}
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}
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BUG_ON(!dev->platform_data);
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return dev->platform_data;
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}
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#define GET_IOC(dev) (HBA_DATA(parisc_walk_tree(dev))->iommu)
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#ifdef CONFIG_IOMMU_CCIO
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struct parisc_device;
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struct ioc;
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void * ccio_get_iommu(const struct parisc_device *dev);
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int ccio_request_resource(const struct parisc_device *dev,
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struct resource *res);
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int ccio_allocate_resource(const struct parisc_device *dev,
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struct resource *res, unsigned long size,
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unsigned long min, unsigned long max, unsigned long align);
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#else /* !CONFIG_IOMMU_CCIO */
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#define ccio_get_iommu(dev) NULL
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#define ccio_request_resource(dev, res) insert_resource(&iomem_resource, res)
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#define ccio_allocate_resource(dev, res, size, min, max, align) \
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allocate_resource(&iomem_resource, res, size, min, max, \
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align, NULL, NULL)
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#endif /* !CONFIG_IOMMU_CCIO */
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#ifdef CONFIG_IOMMU_SBA
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struct parisc_device;
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void * sba_get_iommu(struct parisc_device *dev);
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#endif
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/* At the moment, we panic on error for IOMMU resource exaustion */
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#define dma_mapping_error(dev, x) 0
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#endif
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