forked from Minki/linux
e78fdbad1e
The device-managed allocation API doesn't work well with the life-cycle of device objects. Since ports have device objects allocated within, it can lead to situations where these devices need to stay around until after their parent pad controller has been unbound from its driver. The device-managed memory allocated for the port objects will, however, get freed when the pad controller unbinds from the driver. This can cause use-after-free errors down the road. Note that the device is deleted as part of the driver unbind operation, so there isn't much that can be done with it after that point, but the memory still needs to stay around to ensure none of the references are invalidated. One situation where this arises is when a VBUS supply is associated with a USB 2 or 3 port. When that supply is released using regulator_put() an SRCU call will queue the release of the device link connecting the port and the regulator after a grace period. This means that the regulator is going to keep on to the last reference of the port device even after the pad controller driver was unbound (which is when the memory backing the port device is freed). Fix this by allocating port objects using non-device-managed memory. Add release callbacks for these objects so that their memory gets freed when the last reference goes away. This decouples the port devices' lifetime from the "active" lifetime of the pad controller (i.e. the time during which the pad controller driver owns the device). Signed-off-by: Thierry Reding <treding@nvidia.com>
478 lines
11 KiB
C
478 lines
11 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2015, Google Inc.
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*/
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#ifndef __PHY_TEGRA_XUSB_H
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#define __PHY_TEGRA_XUSB_H
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#include <linux/io.h>
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#include <linux/mutex.h>
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#include <linux/workqueue.h>
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#include <linux/usb/otg.h>
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#include <linux/usb/role.h>
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/* legacy entry points for backwards-compatibility */
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int tegra_xusb_padctl_legacy_probe(struct platform_device *pdev);
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int tegra_xusb_padctl_legacy_remove(struct platform_device *pdev);
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struct phy;
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struct phy_provider;
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struct platform_device;
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struct regulator;
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/*
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* lanes
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*/
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struct tegra_xusb_lane_soc {
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const char *name;
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unsigned int offset;
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unsigned int shift;
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unsigned int mask;
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const char * const *funcs;
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unsigned int num_funcs;
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};
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struct tegra_xusb_lane {
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const struct tegra_xusb_lane_soc *soc;
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struct tegra_xusb_pad *pad;
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struct device_node *np;
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struct list_head list;
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unsigned int function;
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unsigned int index;
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};
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int tegra_xusb_lane_parse_dt(struct tegra_xusb_lane *lane,
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struct device_node *np);
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struct tegra_xusb_usb3_lane {
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struct tegra_xusb_lane base;
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};
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static inline struct tegra_xusb_usb3_lane *
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to_usb3_lane(struct tegra_xusb_lane *lane)
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{
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return container_of(lane, struct tegra_xusb_usb3_lane, base);
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}
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struct tegra_xusb_usb2_lane {
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struct tegra_xusb_lane base;
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u32 hs_curr_level_offset;
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bool powered_on;
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};
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static inline struct tegra_xusb_usb2_lane *
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to_usb2_lane(struct tegra_xusb_lane *lane)
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{
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return container_of(lane, struct tegra_xusb_usb2_lane, base);
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}
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struct tegra_xusb_ulpi_lane {
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struct tegra_xusb_lane base;
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};
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static inline struct tegra_xusb_ulpi_lane *
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to_ulpi_lane(struct tegra_xusb_lane *lane)
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{
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return container_of(lane, struct tegra_xusb_ulpi_lane, base);
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}
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struct tegra_xusb_hsic_lane {
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struct tegra_xusb_lane base;
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u32 strobe_trim;
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u32 rx_strobe_trim;
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u32 rx_data_trim;
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u32 tx_rtune_n;
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u32 tx_rtune_p;
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u32 tx_rslew_n;
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u32 tx_rslew_p;
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bool auto_term;
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};
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static inline struct tegra_xusb_hsic_lane *
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to_hsic_lane(struct tegra_xusb_lane *lane)
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{
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return container_of(lane, struct tegra_xusb_hsic_lane, base);
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}
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struct tegra_xusb_pcie_lane {
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struct tegra_xusb_lane base;
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};
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static inline struct tegra_xusb_pcie_lane *
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to_pcie_lane(struct tegra_xusb_lane *lane)
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{
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return container_of(lane, struct tegra_xusb_pcie_lane, base);
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}
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struct tegra_xusb_sata_lane {
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struct tegra_xusb_lane base;
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};
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static inline struct tegra_xusb_sata_lane *
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to_sata_lane(struct tegra_xusb_lane *lane)
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{
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return container_of(lane, struct tegra_xusb_sata_lane, base);
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}
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struct tegra_xusb_lane_ops {
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struct tegra_xusb_lane *(*probe)(struct tegra_xusb_pad *pad,
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struct device_node *np,
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unsigned int index);
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void (*remove)(struct tegra_xusb_lane *lane);
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};
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/*
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* pads
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*/
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struct tegra_xusb_pad_soc;
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struct tegra_xusb_padctl;
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struct tegra_xusb_pad_ops {
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struct tegra_xusb_pad *(*probe)(struct tegra_xusb_padctl *padctl,
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const struct tegra_xusb_pad_soc *soc,
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struct device_node *np);
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void (*remove)(struct tegra_xusb_pad *pad);
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};
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struct tegra_xusb_pad_soc {
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const char *name;
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const struct tegra_xusb_lane_soc *lanes;
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unsigned int num_lanes;
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const struct tegra_xusb_pad_ops *ops;
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};
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struct tegra_xusb_pad {
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const struct tegra_xusb_pad_soc *soc;
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struct tegra_xusb_padctl *padctl;
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struct phy_provider *provider;
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struct phy **lanes;
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struct device dev;
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const struct tegra_xusb_lane_ops *ops;
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struct list_head list;
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};
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static inline struct tegra_xusb_pad *to_tegra_xusb_pad(struct device *dev)
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{
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return container_of(dev, struct tegra_xusb_pad, dev);
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}
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int tegra_xusb_pad_init(struct tegra_xusb_pad *pad,
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struct tegra_xusb_padctl *padctl,
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struct device_node *np);
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int tegra_xusb_pad_register(struct tegra_xusb_pad *pad,
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const struct phy_ops *ops);
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void tegra_xusb_pad_unregister(struct tegra_xusb_pad *pad);
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struct tegra_xusb_usb3_pad {
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struct tegra_xusb_pad base;
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unsigned int enable;
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struct mutex lock;
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};
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static inline struct tegra_xusb_usb3_pad *
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to_usb3_pad(struct tegra_xusb_pad *pad)
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{
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return container_of(pad, struct tegra_xusb_usb3_pad, base);
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}
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struct tegra_xusb_usb2_pad {
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struct tegra_xusb_pad base;
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struct clk *clk;
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unsigned int enable;
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struct mutex lock;
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};
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static inline struct tegra_xusb_usb2_pad *
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to_usb2_pad(struct tegra_xusb_pad *pad)
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{
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return container_of(pad, struct tegra_xusb_usb2_pad, base);
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}
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struct tegra_xusb_ulpi_pad {
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struct tegra_xusb_pad base;
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};
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static inline struct tegra_xusb_ulpi_pad *
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to_ulpi_pad(struct tegra_xusb_pad *pad)
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{
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return container_of(pad, struct tegra_xusb_ulpi_pad, base);
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}
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struct tegra_xusb_hsic_pad {
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struct tegra_xusb_pad base;
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struct regulator *supply;
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struct clk *clk;
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};
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static inline struct tegra_xusb_hsic_pad *
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to_hsic_pad(struct tegra_xusb_pad *pad)
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{
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return container_of(pad, struct tegra_xusb_hsic_pad, base);
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}
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struct tegra_xusb_pcie_pad {
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struct tegra_xusb_pad base;
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struct reset_control *rst;
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struct clk *pll;
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unsigned int enable;
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};
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static inline struct tegra_xusb_pcie_pad *
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to_pcie_pad(struct tegra_xusb_pad *pad)
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{
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return container_of(pad, struct tegra_xusb_pcie_pad, base);
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}
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struct tegra_xusb_sata_pad {
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struct tegra_xusb_pad base;
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struct reset_control *rst;
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struct clk *pll;
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unsigned int enable;
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};
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static inline struct tegra_xusb_sata_pad *
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to_sata_pad(struct tegra_xusb_pad *pad)
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{
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return container_of(pad, struct tegra_xusb_sata_pad, base);
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}
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/*
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* ports
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*/
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struct tegra_xusb_port_ops;
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struct tegra_xusb_port {
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struct tegra_xusb_padctl *padctl;
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struct tegra_xusb_lane *lane;
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unsigned int index;
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struct list_head list;
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struct device dev;
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struct usb_role_switch *usb_role_sw;
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struct work_struct usb_phy_work;
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struct usb_phy usb_phy;
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const struct tegra_xusb_port_ops *ops;
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};
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static inline struct tegra_xusb_port *to_tegra_xusb_port(struct device *dev)
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{
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return container_of(dev, struct tegra_xusb_port, dev);
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}
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struct tegra_xusb_lane_map {
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unsigned int port;
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const char *type;
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unsigned int index;
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const char *func;
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};
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struct tegra_xusb_lane *
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tegra_xusb_port_find_lane(struct tegra_xusb_port *port,
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const struct tegra_xusb_lane_map *map,
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const char *function);
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struct tegra_xusb_port *
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tegra_xusb_find_port(struct tegra_xusb_padctl *padctl, const char *type,
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unsigned int index);
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struct tegra_xusb_usb2_port {
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struct tegra_xusb_port base;
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struct regulator *supply;
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enum usb_dr_mode mode;
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bool internal;
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int usb3_port_fake;
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};
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static inline struct tegra_xusb_usb2_port *
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to_usb2_port(struct tegra_xusb_port *port)
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{
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return container_of(port, struct tegra_xusb_usb2_port, base);
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}
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struct tegra_xusb_usb2_port *
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tegra_xusb_find_usb2_port(struct tegra_xusb_padctl *padctl,
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unsigned int index);
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void tegra_xusb_usb2_port_release(struct tegra_xusb_port *port);
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void tegra_xusb_usb2_port_remove(struct tegra_xusb_port *port);
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struct tegra_xusb_ulpi_port {
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struct tegra_xusb_port base;
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struct regulator *supply;
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bool internal;
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};
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static inline struct tegra_xusb_ulpi_port *
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to_ulpi_port(struct tegra_xusb_port *port)
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{
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return container_of(port, struct tegra_xusb_ulpi_port, base);
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}
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void tegra_xusb_ulpi_port_release(struct tegra_xusb_port *port);
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struct tegra_xusb_hsic_port {
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struct tegra_xusb_port base;
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};
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static inline struct tegra_xusb_hsic_port *
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to_hsic_port(struct tegra_xusb_port *port)
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{
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return container_of(port, struct tegra_xusb_hsic_port, base);
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}
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void tegra_xusb_hsic_port_release(struct tegra_xusb_port *port);
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struct tegra_xusb_usb3_port {
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struct tegra_xusb_port base;
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struct regulator *supply;
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bool context_saved;
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unsigned int port;
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bool internal;
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bool disable_gen2;
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u32 tap1;
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u32 amp;
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u32 ctle_z;
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u32 ctle_g;
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};
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static inline struct tegra_xusb_usb3_port *
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to_usb3_port(struct tegra_xusb_port *port)
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{
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return container_of(port, struct tegra_xusb_usb3_port, base);
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}
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struct tegra_xusb_usb3_port *
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tegra_xusb_find_usb3_port(struct tegra_xusb_padctl *padctl,
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unsigned int index);
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void tegra_xusb_usb3_port_release(struct tegra_xusb_port *port);
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void tegra_xusb_usb3_port_remove(struct tegra_xusb_port *port);
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struct tegra_xusb_port_ops {
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void (*release)(struct tegra_xusb_port *port);
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void (*remove)(struct tegra_xusb_port *port);
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int (*enable)(struct tegra_xusb_port *port);
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void (*disable)(struct tegra_xusb_port *port);
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struct tegra_xusb_lane *(*map)(struct tegra_xusb_port *port);
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};
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/*
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* pad controller
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*/
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struct tegra_xusb_padctl_soc;
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struct tegra_xusb_padctl_ops {
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struct tegra_xusb_padctl *
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(*probe)(struct device *dev,
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const struct tegra_xusb_padctl_soc *soc);
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void (*remove)(struct tegra_xusb_padctl *padctl);
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int (*usb3_save_context)(struct tegra_xusb_padctl *padctl,
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unsigned int index);
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int (*hsic_set_idle)(struct tegra_xusb_padctl *padctl,
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unsigned int index, bool idle);
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int (*usb3_set_lfps_detect)(struct tegra_xusb_padctl *padctl,
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unsigned int index, bool enable);
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int (*vbus_override)(struct tegra_xusb_padctl *padctl, bool set);
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int (*utmi_port_reset)(struct phy *phy);
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};
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struct tegra_xusb_padctl_soc {
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const struct tegra_xusb_pad_soc * const *pads;
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unsigned int num_pads;
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struct {
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struct {
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const struct tegra_xusb_port_ops *ops;
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unsigned int count;
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} usb2, ulpi, hsic, usb3;
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} ports;
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const struct tegra_xusb_padctl_ops *ops;
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const char * const *supply_names;
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unsigned int num_supplies;
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bool supports_gen2;
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bool need_fake_usb3_port;
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};
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struct tegra_xusb_padctl {
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struct device *dev;
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void __iomem *regs;
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struct mutex lock;
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struct reset_control *rst;
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const struct tegra_xusb_padctl_soc *soc;
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struct tegra_xusb_pad *pcie;
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struct tegra_xusb_pad *sata;
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struct tegra_xusb_pad *ulpi;
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struct tegra_xusb_pad *usb2;
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struct tegra_xusb_pad *hsic;
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struct list_head ports;
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struct list_head lanes;
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struct list_head pads;
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unsigned int enable;
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struct clk *clk;
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struct regulator_bulk_data *supplies;
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};
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static inline void padctl_writel(struct tegra_xusb_padctl *padctl, u32 value,
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unsigned long offset)
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{
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dev_dbg(padctl->dev, "%08lx < %08x\n", offset, value);
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writel(value, padctl->regs + offset);
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}
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static inline u32 padctl_readl(struct tegra_xusb_padctl *padctl,
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unsigned long offset)
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{
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u32 value = readl(padctl->regs + offset);
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dev_dbg(padctl->dev, "%08lx > %08x\n", offset, value);
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return value;
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}
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struct tegra_xusb_lane *tegra_xusb_find_lane(struct tegra_xusb_padctl *padctl,
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const char *name,
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unsigned int index);
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#if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC)
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extern const struct tegra_xusb_padctl_soc tegra124_xusb_padctl_soc;
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#endif
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#if defined(CONFIG_ARCH_TEGRA_210_SOC)
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extern const struct tegra_xusb_padctl_soc tegra210_xusb_padctl_soc;
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#endif
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#if defined(CONFIG_ARCH_TEGRA_186_SOC)
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extern const struct tegra_xusb_padctl_soc tegra186_xusb_padctl_soc;
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#endif
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#if defined(CONFIG_ARCH_TEGRA_194_SOC)
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extern const struct tegra_xusb_padctl_soc tegra194_xusb_padctl_soc;
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#endif
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#endif /* __PHY_TEGRA_XUSB_H */
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