Shannon Zhao 76993739cd arm64: KVM: Add helper to handle PMCR register bits ... According to ARMv8 spec, when writing 1 to PMCR.E, all counters are enabled by PMCNTENSET, while writing 0 to PMCR.E, all counters are disabled. When writing 1 to PMCR.P, reset all event counters, not including PMCCNTR, to zero. When writing 1 to PMCR.C, reset PMCCNTR to zero. Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>		2016-02-29 18:34:21 +00:00
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hyp	arm64: KVM: Move vgic-v2 and timer save/restore to virt/kvm/arm/hyp	2016-02-29 18:34:18 +00:00
arch_timer.c	KVM: arm/arm64: Fix reference to uninitialised VGIC	2016-02-08 15:23:39 +00:00
pmu.c	arm64: KVM: Add helper to handle PMCR register bits	2016-02-29 18:34:21 +00:00
trace.h	arm/arm64: KVM: Add tracepoints for vgic and timer	2015-10-22 23:01:48 +02:00
vgic-v2-emul.c	KVM: arm/arm64: rework MMIO abort handling to use KVM MMIO bus	2015-03-30 17:07:19 +01:00
vgic-v2.c	KVM: arm/arm64: Merge vgic_set_lr() and vgic_sync_lr_elrsr()	2015-11-04 15:29:49 +01:00
vgic-v3-emul.c	KVM: arm: vgic: Drop useless Group0 warning	2015-06-17 09:58:12 +01:00
vgic-v3.c	arm64: KVM: Turn system register numbers to an enum	2015-12-14 11:30:43 +00:00
vgic.c	KVM: arm/arm64: vgic: Ensure bitmaps are long enough	2016-02-23 19:02:48 +00:00
vgic.h	KVM: arm/arm64: rework MMIO abort handling to use KVM MMIO bus	2015-03-30 17:07:19 +01:00