forked from Minki/linux
a6b7a40786
* remove interrupt.g inclusion from netdevice.h -- not needed * fixup fallout, add interrupt.h and hardirq.h back where needed. Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
1626 lines
41 KiB
C
1626 lines
41 KiB
C
/********************************************************************
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Filename: via-ircc.c
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Version: 1.0
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Description: Driver for the VIA VT8231/VT8233 IrDA chipsets
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Author: VIA Technologies,inc
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Date : 08/06/2003
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Copyright (c) 1998-2003 VIA Technologies, Inc.
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This program is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License as published by the Free Software
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Foundation; either version 2, or (at your option) any later version.
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This program is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTIES OR REPRESENTATIONS; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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See the GNU General Public License for more details.
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You should have received a copy of the GNU General Public License along with
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this program; if not, write to the Free Software Foundation, Inc.,
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59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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F01 Oct/02/02: Modify code for V0.11(move out back to back transfer)
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F02 Oct/28/02: Add SB device ID for 3147 and 3177.
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Comment :
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jul/09/2002 : only implement two kind of dongle currently.
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Oct/02/2002 : work on VT8231 and VT8233 .
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Aug/06/2003 : change driver format to pci driver .
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2004-02-16: <sda@bdit.de>
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- Removed unneeded 'legacy' pci stuff.
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- Make sure SIR mode is set (hw_init()) before calling mode-dependent stuff.
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- On speed change from core, don't send SIR frame with new speed.
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Use current speed and change speeds later.
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- Make module-param dongle_id actually work.
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- New dongle_id 17 (0x11): TDFS4500. Single-ended SIR only.
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Tested with home-grown PCB on EPIA boards.
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- Code cleanup.
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********************************************************************/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/skbuff.h>
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#include <linux/netdevice.h>
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#include <linux/ioport.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/rtnetlink.h>
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#include <linux/pci.h>
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#include <linux/dma-mapping.h>
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#include <linux/gfp.h>
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#include <asm/io.h>
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#include <asm/dma.h>
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#include <asm/byteorder.h>
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#include <linux/pm.h>
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#include <net/irda/wrapper.h>
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#include <net/irda/irda.h>
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#include <net/irda/irda_device.h>
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#include "via-ircc.h"
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#define VIA_MODULE_NAME "via-ircc"
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#define CHIP_IO_EXTENT 0x40
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static char *driver_name = VIA_MODULE_NAME;
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/* Module parameters */
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static int qos_mtt_bits = 0x07; /* 1 ms or more */
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static int dongle_id = 0; /* default: probe */
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/* We can't guess the type of connected dongle, user *must* supply it. */
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module_param(dongle_id, int, 0);
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/* Some prototypes */
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static int via_ircc_open(struct pci_dev *pdev, chipio_t * info,
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unsigned int id);
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static int via_ircc_dma_receive(struct via_ircc_cb *self);
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static int via_ircc_dma_receive_complete(struct via_ircc_cb *self,
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int iobase);
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static netdev_tx_t via_ircc_hard_xmit_sir(struct sk_buff *skb,
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struct net_device *dev);
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static netdev_tx_t via_ircc_hard_xmit_fir(struct sk_buff *skb,
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struct net_device *dev);
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static void via_hw_init(struct via_ircc_cb *self);
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static void via_ircc_change_speed(struct via_ircc_cb *self, __u32 baud);
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static irqreturn_t via_ircc_interrupt(int irq, void *dev_id);
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static int via_ircc_is_receiving(struct via_ircc_cb *self);
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static int via_ircc_read_dongle_id(int iobase);
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static int via_ircc_net_open(struct net_device *dev);
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static int via_ircc_net_close(struct net_device *dev);
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static int via_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq,
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int cmd);
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static void via_ircc_change_dongle_speed(int iobase, int speed,
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int dongle_id);
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static int RxTimerHandler(struct via_ircc_cb *self, int iobase);
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static void hwreset(struct via_ircc_cb *self);
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static int via_ircc_dma_xmit(struct via_ircc_cb *self, u16 iobase);
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static int upload_rxdata(struct via_ircc_cb *self, int iobase);
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static int __devinit via_init_one (struct pci_dev *pcidev, const struct pci_device_id *id);
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static void __devexit via_remove_one (struct pci_dev *pdev);
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/* FIXME : Should use udelay() instead, even if we are x86 only - Jean II */
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static void iodelay(int udelay)
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{
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u8 data;
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int i;
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for (i = 0; i < udelay; i++) {
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data = inb(0x80);
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}
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}
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static DEFINE_PCI_DEVICE_TABLE(via_pci_tbl) = {
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{ PCI_VENDOR_ID_VIA, 0x8231, PCI_ANY_ID, PCI_ANY_ID,0,0,0 },
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{ PCI_VENDOR_ID_VIA, 0x3109, PCI_ANY_ID, PCI_ANY_ID,0,0,1 },
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{ PCI_VENDOR_ID_VIA, 0x3074, PCI_ANY_ID, PCI_ANY_ID,0,0,2 },
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{ PCI_VENDOR_ID_VIA, 0x3147, PCI_ANY_ID, PCI_ANY_ID,0,0,3 },
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{ PCI_VENDOR_ID_VIA, 0x3177, PCI_ANY_ID, PCI_ANY_ID,0,0,4 },
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{ 0, }
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};
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MODULE_DEVICE_TABLE(pci,via_pci_tbl);
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static struct pci_driver via_driver = {
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.name = VIA_MODULE_NAME,
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.id_table = via_pci_tbl,
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.probe = via_init_one,
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.remove = __devexit_p(via_remove_one),
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};
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/*
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* Function via_ircc_init ()
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*
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* Initialize chip. Just find out chip type and resource.
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*/
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static int __init via_ircc_init(void)
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{
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int rc;
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IRDA_DEBUG(3, "%s()\n", __func__);
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rc = pci_register_driver(&via_driver);
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if (rc < 0) {
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IRDA_DEBUG(0, "%s(): error rc = %d, returning -ENODEV...\n",
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__func__, rc);
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return -ENODEV;
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}
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return 0;
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}
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static int __devinit via_init_one (struct pci_dev *pcidev, const struct pci_device_id *id)
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{
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int rc;
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u8 temp,oldPCI_40,oldPCI_44,bTmp,bTmp1;
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u16 Chipset,FirDRQ1,FirDRQ0,FirIRQ,FirIOBase;
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chipio_t info;
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IRDA_DEBUG(2, "%s(): Device ID=(0X%X)\n", __func__, id->device);
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rc = pci_enable_device (pcidev);
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if (rc) {
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IRDA_DEBUG(0, "%s(): error rc = %d\n", __func__, rc);
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return -ENODEV;
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}
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// South Bridge exist
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if ( ReadLPCReg(0x20) != 0x3C )
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Chipset=0x3096;
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else
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Chipset=0x3076;
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if (Chipset==0x3076) {
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IRDA_DEBUG(2, "%s(): Chipset = 3076\n", __func__);
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WriteLPCReg(7,0x0c );
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temp=ReadLPCReg(0x30);//check if BIOS Enable Fir
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if((temp&0x01)==1) { // BIOS close or no FIR
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WriteLPCReg(0x1d, 0x82 );
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WriteLPCReg(0x23,0x18);
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temp=ReadLPCReg(0xF0);
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if((temp&0x01)==0) {
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temp=(ReadLPCReg(0x74)&0x03); //DMA
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FirDRQ0=temp + 4;
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temp=(ReadLPCReg(0x74)&0x0C) >> 2;
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FirDRQ1=temp + 4;
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} else {
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temp=(ReadLPCReg(0x74)&0x0C) >> 2; //DMA
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FirDRQ0=temp + 4;
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FirDRQ1=FirDRQ0;
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}
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FirIRQ=(ReadLPCReg(0x70)&0x0f); //IRQ
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FirIOBase=ReadLPCReg(0x60 ) << 8; //IO Space :high byte
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FirIOBase=FirIOBase| ReadLPCReg(0x61) ; //low byte
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FirIOBase=FirIOBase ;
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info.fir_base=FirIOBase;
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info.irq=FirIRQ;
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info.dma=FirDRQ1;
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info.dma2=FirDRQ0;
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pci_read_config_byte(pcidev,0x40,&bTmp);
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pci_write_config_byte(pcidev,0x40,((bTmp | 0x08) & 0xfe));
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pci_read_config_byte(pcidev,0x42,&bTmp);
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pci_write_config_byte(pcidev,0x42,(bTmp | 0xf0));
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pci_write_config_byte(pcidev,0x5a,0xc0);
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WriteLPCReg(0x28, 0x70 );
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if (via_ircc_open(pcidev, &info, 0x3076) == 0)
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rc=0;
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} else
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rc = -ENODEV; //IR not turn on
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} else { //Not VT1211
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IRDA_DEBUG(2, "%s(): Chipset = 3096\n", __func__);
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pci_read_config_byte(pcidev,0x67,&bTmp);//check if BIOS Enable Fir
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if((bTmp&0x01)==1) { // BIOS enable FIR
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//Enable Double DMA clock
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pci_read_config_byte(pcidev,0x42,&oldPCI_40);
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pci_write_config_byte(pcidev,0x42,oldPCI_40 | 0x80);
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pci_read_config_byte(pcidev,0x40,&oldPCI_40);
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pci_write_config_byte(pcidev,0x40,oldPCI_40 & 0xf7);
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pci_read_config_byte(pcidev,0x44,&oldPCI_44);
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pci_write_config_byte(pcidev,0x44,0x4e);
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//---------- read configuration from Function0 of south bridge
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if((bTmp&0x02)==0) {
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pci_read_config_byte(pcidev,0x44,&bTmp1); //DMA
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FirDRQ0 = (bTmp1 & 0x30) >> 4;
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pci_read_config_byte(pcidev,0x44,&bTmp1);
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FirDRQ1 = (bTmp1 & 0xc0) >> 6;
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} else {
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pci_read_config_byte(pcidev,0x44,&bTmp1); //DMA
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FirDRQ0 = (bTmp1 & 0x30) >> 4 ;
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FirDRQ1=0;
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}
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pci_read_config_byte(pcidev,0x47,&bTmp1); //IRQ
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FirIRQ = bTmp1 & 0x0f;
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pci_read_config_byte(pcidev,0x69,&bTmp);
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FirIOBase = bTmp << 8;//hight byte
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pci_read_config_byte(pcidev,0x68,&bTmp);
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FirIOBase = (FirIOBase | bTmp ) & 0xfff0;
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//-------------------------
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info.fir_base=FirIOBase;
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info.irq=FirIRQ;
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info.dma=FirDRQ1;
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info.dma2=FirDRQ0;
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if (via_ircc_open(pcidev, &info, 0x3096) == 0)
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rc=0;
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} else
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rc = -ENODEV; //IR not turn on !!!!!
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}//Not VT1211
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IRDA_DEBUG(2, "%s(): End - rc = %d\n", __func__, rc);
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return rc;
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}
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static void __exit via_ircc_cleanup(void)
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{
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IRDA_DEBUG(3, "%s()\n", __func__);
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/* Cleanup all instances of the driver */
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pci_unregister_driver (&via_driver);
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}
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static const struct net_device_ops via_ircc_sir_ops = {
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.ndo_start_xmit = via_ircc_hard_xmit_sir,
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.ndo_open = via_ircc_net_open,
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.ndo_stop = via_ircc_net_close,
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.ndo_do_ioctl = via_ircc_net_ioctl,
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};
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static const struct net_device_ops via_ircc_fir_ops = {
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.ndo_start_xmit = via_ircc_hard_xmit_fir,
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.ndo_open = via_ircc_net_open,
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.ndo_stop = via_ircc_net_close,
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.ndo_do_ioctl = via_ircc_net_ioctl,
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};
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/*
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* Function via_ircc_open(pdev, iobase, irq)
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*
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* Open driver instance
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*
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*/
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static __devinit int via_ircc_open(struct pci_dev *pdev, chipio_t * info,
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unsigned int id)
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{
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struct net_device *dev;
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struct via_ircc_cb *self;
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int err;
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IRDA_DEBUG(3, "%s()\n", __func__);
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/* Allocate new instance of the driver */
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dev = alloc_irdadev(sizeof(struct via_ircc_cb));
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if (dev == NULL)
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return -ENOMEM;
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self = netdev_priv(dev);
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self->netdev = dev;
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spin_lock_init(&self->lock);
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pci_set_drvdata(pdev, self);
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/* Initialize Resource */
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self->io.cfg_base = info->cfg_base;
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self->io.fir_base = info->fir_base;
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self->io.irq = info->irq;
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self->io.fir_ext = CHIP_IO_EXTENT;
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self->io.dma = info->dma;
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self->io.dma2 = info->dma2;
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self->io.fifo_size = 32;
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self->chip_id = id;
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self->st_fifo.len = 0;
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self->RxDataReady = 0;
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|
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/* Reserve the ioports that we need */
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if (!request_region(self->io.fir_base, self->io.fir_ext, driver_name)) {
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IRDA_DEBUG(0, "%s(), can't get iobase of 0x%03x\n",
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__func__, self->io.fir_base);
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err = -ENODEV;
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goto err_out1;
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}
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|
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/* Initialize QoS for this device */
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irda_init_max_qos_capabilies(&self->qos);
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|
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/* Check if user has supplied the dongle id or not */
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if (!dongle_id)
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dongle_id = via_ircc_read_dongle_id(self->io.fir_base);
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self->io.dongle_id = dongle_id;
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|
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/* The only value we must override it the baudrate */
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/* Maximum speeds and capabilities are dongle-dependent. */
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switch( self->io.dongle_id ){
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case 0x0d:
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self->qos.baud_rate.bits =
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IR_9600 | IR_19200 | IR_38400 | IR_57600 | IR_115200 |
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IR_576000 | IR_1152000 | (IR_4000000 << 8);
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break;
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default:
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self->qos.baud_rate.bits =
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IR_9600 | IR_19200 | IR_38400 | IR_57600 | IR_115200;
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break;
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}
|
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|
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/* Following was used for testing:
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*
|
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* self->qos.baud_rate.bits = IR_9600;
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*
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* Is is no good, as it prohibits (error-prone) speed-changes.
|
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*/
|
|
|
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self->qos.min_turn_time.bits = qos_mtt_bits;
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irda_qos_bits_to_value(&self->qos);
|
|
|
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/* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
|
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self->rx_buff.truesize = 14384 + 2048;
|
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self->tx_buff.truesize = 14384 + 2048;
|
|
|
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/* Allocate memory if needed */
|
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self->rx_buff.head =
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dma_alloc_coherent(&pdev->dev, self->rx_buff.truesize,
|
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&self->rx_buff_dma, GFP_KERNEL);
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if (self->rx_buff.head == NULL) {
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err = -ENOMEM;
|
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goto err_out2;
|
|
}
|
|
memset(self->rx_buff.head, 0, self->rx_buff.truesize);
|
|
|
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self->tx_buff.head =
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dma_alloc_coherent(&pdev->dev, self->tx_buff.truesize,
|
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&self->tx_buff_dma, GFP_KERNEL);
|
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if (self->tx_buff.head == NULL) {
|
|
err = -ENOMEM;
|
|
goto err_out3;
|
|
}
|
|
memset(self->tx_buff.head, 0, self->tx_buff.truesize);
|
|
|
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self->rx_buff.in_frame = FALSE;
|
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self->rx_buff.state = OUTSIDE_FRAME;
|
|
self->tx_buff.data = self->tx_buff.head;
|
|
self->rx_buff.data = self->rx_buff.head;
|
|
|
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/* Reset Tx queue info */
|
|
self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
|
|
self->tx_fifo.tail = self->tx_buff.head;
|
|
|
|
/* Override the network functions we need to use */
|
|
dev->netdev_ops = &via_ircc_sir_ops;
|
|
|
|
err = register_netdev(dev);
|
|
if (err)
|
|
goto err_out4;
|
|
|
|
IRDA_MESSAGE("IrDA: Registered device %s (via-ircc)\n", dev->name);
|
|
|
|
/* Initialise the hardware..
|
|
*/
|
|
self->io.speed = 9600;
|
|
via_hw_init(self);
|
|
return 0;
|
|
err_out4:
|
|
dma_free_coherent(&pdev->dev, self->tx_buff.truesize,
|
|
self->tx_buff.head, self->tx_buff_dma);
|
|
err_out3:
|
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dma_free_coherent(&pdev->dev, self->rx_buff.truesize,
|
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self->rx_buff.head, self->rx_buff_dma);
|
|
err_out2:
|
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release_region(self->io.fir_base, self->io.fir_ext);
|
|
err_out1:
|
|
pci_set_drvdata(pdev, NULL);
|
|
free_netdev(dev);
|
|
return err;
|
|
}
|
|
|
|
/*
|
|
* Function via_remove_one(pdev)
|
|
*
|
|
* Close driver instance
|
|
*
|
|
*/
|
|
static void __devexit via_remove_one(struct pci_dev *pdev)
|
|
{
|
|
struct via_ircc_cb *self = pci_get_drvdata(pdev);
|
|
int iobase;
|
|
|
|
IRDA_DEBUG(3, "%s()\n", __func__);
|
|
|
|
iobase = self->io.fir_base;
|
|
|
|
ResetChip(iobase, 5); //hardware reset.
|
|
/* Remove netdevice */
|
|
unregister_netdev(self->netdev);
|
|
|
|
/* Release the PORT that this driver is using */
|
|
IRDA_DEBUG(2, "%s(), Releasing Region %03x\n",
|
|
__func__, self->io.fir_base);
|
|
release_region(self->io.fir_base, self->io.fir_ext);
|
|
if (self->tx_buff.head)
|
|
dma_free_coherent(&pdev->dev, self->tx_buff.truesize,
|
|
self->tx_buff.head, self->tx_buff_dma);
|
|
if (self->rx_buff.head)
|
|
dma_free_coherent(&pdev->dev, self->rx_buff.truesize,
|
|
self->rx_buff.head, self->rx_buff_dma);
|
|
pci_set_drvdata(pdev, NULL);
|
|
|
|
free_netdev(self->netdev);
|
|
|
|
pci_disable_device(pdev);
|
|
}
|
|
|
|
/*
|
|
* Function via_hw_init(self)
|
|
*
|
|
* Returns non-negative on success.
|
|
*
|
|
* Formerly via_ircc_setup
|
|
*/
|
|
static void via_hw_init(struct via_ircc_cb *self)
|
|
{
|
|
int iobase = self->io.fir_base;
|
|
|
|
IRDA_DEBUG(3, "%s()\n", __func__);
|
|
|
|
SetMaxRxPacketSize(iobase, 0x0fff); //set to max:4095
|
|
// FIFO Init
|
|
EnRXFIFOReadyInt(iobase, OFF);
|
|
EnRXFIFOHalfLevelInt(iobase, OFF);
|
|
EnTXFIFOHalfLevelInt(iobase, OFF);
|
|
EnTXFIFOUnderrunEOMInt(iobase, ON);
|
|
EnTXFIFOReadyInt(iobase, OFF);
|
|
InvertTX(iobase, OFF);
|
|
InvertRX(iobase, OFF);
|
|
|
|
if (ReadLPCReg(0x20) == 0x3c)
|
|
WriteLPCReg(0xF0, 0); // for VT1211
|
|
/* Int Init */
|
|
EnRXSpecInt(iobase, ON);
|
|
|
|
/* The following is basically hwreset */
|
|
/* If this is the case, why not just call hwreset() ? Jean II */
|
|
ResetChip(iobase, 5);
|
|
EnableDMA(iobase, OFF);
|
|
EnableTX(iobase, OFF);
|
|
EnableRX(iobase, OFF);
|
|
EnRXDMA(iobase, OFF);
|
|
EnTXDMA(iobase, OFF);
|
|
RXStart(iobase, OFF);
|
|
TXStart(iobase, OFF);
|
|
InitCard(iobase);
|
|
CommonInit(iobase);
|
|
SIRFilter(iobase, ON);
|
|
SetSIR(iobase, ON);
|
|
CRC16(iobase, ON);
|
|
EnTXCRC(iobase, 0);
|
|
WriteReg(iobase, I_ST_CT_0, 0x00);
|
|
SetBaudRate(iobase, 9600);
|
|
SetPulseWidth(iobase, 12);
|
|
SetSendPreambleCount(iobase, 0);
|
|
|
|
self->io.speed = 9600;
|
|
self->st_fifo.len = 0;
|
|
|
|
via_ircc_change_dongle_speed(iobase, self->io.speed,
|
|
self->io.dongle_id);
|
|
|
|
WriteReg(iobase, I_ST_CT_0, 0x80);
|
|
}
|
|
|
|
/*
|
|
* Function via_ircc_read_dongle_id (void)
|
|
*
|
|
*/
|
|
static int via_ircc_read_dongle_id(int iobase)
|
|
{
|
|
int dongle_id = 9; /* Default to IBM */
|
|
|
|
IRDA_ERROR("via-ircc: dongle probing not supported, please specify dongle_id module parameter.\n");
|
|
return dongle_id;
|
|
}
|
|
|
|
/*
|
|
* Function via_ircc_change_dongle_speed (iobase, speed, dongle_id)
|
|
* Change speed of the attach dongle
|
|
* only implement two type of dongle currently.
|
|
*/
|
|
static void via_ircc_change_dongle_speed(int iobase, int speed,
|
|
int dongle_id)
|
|
{
|
|
u8 mode = 0;
|
|
|
|
/* speed is unused, as we use IsSIROn()/IsMIROn() */
|
|
speed = speed;
|
|
|
|
IRDA_DEBUG(1, "%s(): change_dongle_speed to %d for 0x%x, %d\n",
|
|
__func__, speed, iobase, dongle_id);
|
|
|
|
switch (dongle_id) {
|
|
|
|
/* Note: The dongle_id's listed here are derived from
|
|
* nsc-ircc.c */
|
|
|
|
case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
|
|
UseOneRX(iobase, ON); // use one RX pin RX1,RX2
|
|
InvertTX(iobase, OFF);
|
|
InvertRX(iobase, OFF);
|
|
|
|
EnRX2(iobase, ON); //sir to rx2
|
|
EnGPIOtoRX2(iobase, OFF);
|
|
|
|
if (IsSIROn(iobase)) { //sir
|
|
// Mode select Off
|
|
SlowIRRXLowActive(iobase, ON);
|
|
udelay(1000);
|
|
SlowIRRXLowActive(iobase, OFF);
|
|
} else {
|
|
if (IsMIROn(iobase)) { //mir
|
|
// Mode select On
|
|
SlowIRRXLowActive(iobase, OFF);
|
|
udelay(20);
|
|
} else { // fir
|
|
if (IsFIROn(iobase)) { //fir
|
|
// Mode select On
|
|
SlowIRRXLowActive(iobase, OFF);
|
|
udelay(20);
|
|
}
|
|
}
|
|
}
|
|
break;
|
|
|
|
case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
|
|
UseOneRX(iobase, ON); //use ONE RX....RX1
|
|
InvertTX(iobase, OFF);
|
|
InvertRX(iobase, OFF); // invert RX pin
|
|
|
|
EnRX2(iobase, ON);
|
|
EnGPIOtoRX2(iobase, OFF);
|
|
if (IsSIROn(iobase)) { //sir
|
|
// Mode select On
|
|
SlowIRRXLowActive(iobase, ON);
|
|
udelay(20);
|
|
// Mode select Off
|
|
SlowIRRXLowActive(iobase, OFF);
|
|
}
|
|
if (IsMIROn(iobase)) { //mir
|
|
// Mode select On
|
|
SlowIRRXLowActive(iobase, OFF);
|
|
udelay(20);
|
|
// Mode select Off
|
|
SlowIRRXLowActive(iobase, ON);
|
|
} else { // fir
|
|
if (IsFIROn(iobase)) { //fir
|
|
// Mode select On
|
|
SlowIRRXLowActive(iobase, OFF);
|
|
// TX On
|
|
WriteTX(iobase, ON);
|
|
udelay(20);
|
|
// Mode select OFF
|
|
SlowIRRXLowActive(iobase, ON);
|
|
udelay(20);
|
|
// TX Off
|
|
WriteTX(iobase, OFF);
|
|
}
|
|
}
|
|
break;
|
|
|
|
case 0x0d:
|
|
UseOneRX(iobase, OFF); // use two RX pin RX1,RX2
|
|
InvertTX(iobase, OFF);
|
|
InvertRX(iobase, OFF);
|
|
SlowIRRXLowActive(iobase, OFF);
|
|
if (IsSIROn(iobase)) { //sir
|
|
EnGPIOtoRX2(iobase, OFF);
|
|
WriteGIO(iobase, OFF);
|
|
EnRX2(iobase, OFF); //sir to rx2
|
|
} else { // fir mir
|
|
EnGPIOtoRX2(iobase, OFF);
|
|
WriteGIO(iobase, OFF);
|
|
EnRX2(iobase, OFF); //fir to rx
|
|
}
|
|
break;
|
|
|
|
case 0x11: /* Temic TFDS4500 */
|
|
|
|
IRDA_DEBUG(2, "%s: Temic TFDS4500: One RX pin, TX normal, RX inverted.\n", __func__);
|
|
|
|
UseOneRX(iobase, ON); //use ONE RX....RX1
|
|
InvertTX(iobase, OFF);
|
|
InvertRX(iobase, ON); // invert RX pin
|
|
|
|
EnRX2(iobase, ON); //sir to rx2
|
|
EnGPIOtoRX2(iobase, OFF);
|
|
|
|
if( IsSIROn(iobase) ){ //sir
|
|
|
|
// Mode select On
|
|
SlowIRRXLowActive(iobase, ON);
|
|
udelay(20);
|
|
// Mode select Off
|
|
SlowIRRXLowActive(iobase, OFF);
|
|
|
|
} else{
|
|
IRDA_DEBUG(0, "%s: Warning: TFDS4500 not running in SIR mode !\n", __func__);
|
|
}
|
|
break;
|
|
|
|
case 0x0ff: /* Vishay */
|
|
if (IsSIROn(iobase))
|
|
mode = 0;
|
|
else if (IsMIROn(iobase))
|
|
mode = 1;
|
|
else if (IsFIROn(iobase))
|
|
mode = 2;
|
|
else if (IsVFIROn(iobase))
|
|
mode = 5; //VFIR-16
|
|
SI_SetMode(iobase, mode);
|
|
break;
|
|
|
|
default:
|
|
IRDA_ERROR("%s: Error: dongle_id %d unsupported !\n",
|
|
__func__, dongle_id);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Function via_ircc_change_speed (self, baud)
|
|
*
|
|
* Change the speed of the device
|
|
*
|
|
*/
|
|
static void via_ircc_change_speed(struct via_ircc_cb *self, __u32 speed)
|
|
{
|
|
struct net_device *dev = self->netdev;
|
|
u16 iobase;
|
|
u8 value = 0, bTmp;
|
|
|
|
iobase = self->io.fir_base;
|
|
/* Update accounting for new speed */
|
|
self->io.speed = speed;
|
|
IRDA_DEBUG(1, "%s: change_speed to %d bps.\n", __func__, speed);
|
|
|
|
WriteReg(iobase, I_ST_CT_0, 0x0);
|
|
|
|
/* Controller mode sellection */
|
|
switch (speed) {
|
|
case 2400:
|
|
case 9600:
|
|
case 19200:
|
|
case 38400:
|
|
case 57600:
|
|
case 115200:
|
|
value = (115200/speed)-1;
|
|
SetSIR(iobase, ON);
|
|
CRC16(iobase, ON);
|
|
break;
|
|
case 576000:
|
|
/* FIXME: this can't be right, as it's the same as 115200,
|
|
* and 576000 is MIR, not SIR. */
|
|
value = 0;
|
|
SetSIR(iobase, ON);
|
|
CRC16(iobase, ON);
|
|
break;
|
|
case 1152000:
|
|
value = 0;
|
|
SetMIR(iobase, ON);
|
|
/* FIXME: CRC ??? */
|
|
break;
|
|
case 4000000:
|
|
value = 0;
|
|
SetFIR(iobase, ON);
|
|
SetPulseWidth(iobase, 0);
|
|
SetSendPreambleCount(iobase, 14);
|
|
CRC16(iobase, OFF);
|
|
EnTXCRC(iobase, ON);
|
|
break;
|
|
case 16000000:
|
|
value = 0;
|
|
SetVFIR(iobase, ON);
|
|
/* FIXME: CRC ??? */
|
|
break;
|
|
default:
|
|
value = 0;
|
|
break;
|
|
}
|
|
|
|
/* Set baudrate to 0x19[2..7] */
|
|
bTmp = (ReadReg(iobase, I_CF_H_1) & 0x03);
|
|
bTmp |= value << 2;
|
|
WriteReg(iobase, I_CF_H_1, bTmp);
|
|
|
|
/* Some dongles may need to be informed about speed changes. */
|
|
via_ircc_change_dongle_speed(iobase, speed, self->io.dongle_id);
|
|
|
|
/* Set FIFO size to 64 */
|
|
SetFIFO(iobase, 64);
|
|
|
|
/* Enable IR */
|
|
WriteReg(iobase, I_ST_CT_0, 0x80);
|
|
|
|
// EnTXFIFOHalfLevelInt(iobase,ON);
|
|
|
|
/* Enable some interrupts so we can receive frames */
|
|
//EnAllInt(iobase,ON);
|
|
|
|
if (IsSIROn(iobase)) {
|
|
SIRFilter(iobase, ON);
|
|
SIRRecvAny(iobase, ON);
|
|
} else {
|
|
SIRFilter(iobase, OFF);
|
|
SIRRecvAny(iobase, OFF);
|
|
}
|
|
|
|
if (speed > 115200) {
|
|
/* Install FIR xmit handler */
|
|
dev->netdev_ops = &via_ircc_fir_ops;
|
|
via_ircc_dma_receive(self);
|
|
} else {
|
|
/* Install SIR xmit handler */
|
|
dev->netdev_ops = &via_ircc_sir_ops;
|
|
}
|
|
netif_wake_queue(dev);
|
|
}
|
|
|
|
/*
|
|
* Function via_ircc_hard_xmit (skb, dev)
|
|
*
|
|
* Transmit the frame!
|
|
*
|
|
*/
|
|
static netdev_tx_t via_ircc_hard_xmit_sir(struct sk_buff *skb,
|
|
struct net_device *dev)
|
|
{
|
|
struct via_ircc_cb *self;
|
|
unsigned long flags;
|
|
u16 iobase;
|
|
__u32 speed;
|
|
|
|
self = netdev_priv(dev);
|
|
IRDA_ASSERT(self != NULL, return NETDEV_TX_OK;);
|
|
iobase = self->io.fir_base;
|
|
|
|
netif_stop_queue(dev);
|
|
/* Check if we need to change the speed */
|
|
speed = irda_get_next_speed(skb);
|
|
if ((speed != self->io.speed) && (speed != -1)) {
|
|
/* Check for empty frame */
|
|
if (!skb->len) {
|
|
via_ircc_change_speed(self, speed);
|
|
dev->trans_start = jiffies;
|
|
dev_kfree_skb(skb);
|
|
return NETDEV_TX_OK;
|
|
} else
|
|
self->new_speed = speed;
|
|
}
|
|
InitCard(iobase);
|
|
CommonInit(iobase);
|
|
SIRFilter(iobase, ON);
|
|
SetSIR(iobase, ON);
|
|
CRC16(iobase, ON);
|
|
EnTXCRC(iobase, 0);
|
|
WriteReg(iobase, I_ST_CT_0, 0x00);
|
|
|
|
spin_lock_irqsave(&self->lock, flags);
|
|
self->tx_buff.data = self->tx_buff.head;
|
|
self->tx_buff.len =
|
|
async_wrap_skb(skb, self->tx_buff.data,
|
|
self->tx_buff.truesize);
|
|
|
|
dev->stats.tx_bytes += self->tx_buff.len;
|
|
/* Send this frame with old speed */
|
|
SetBaudRate(iobase, self->io.speed);
|
|
SetPulseWidth(iobase, 12);
|
|
SetSendPreambleCount(iobase, 0);
|
|
WriteReg(iobase, I_ST_CT_0, 0x80);
|
|
|
|
EnableTX(iobase, ON);
|
|
EnableRX(iobase, OFF);
|
|
|
|
ResetChip(iobase, 0);
|
|
ResetChip(iobase, 1);
|
|
ResetChip(iobase, 2);
|
|
ResetChip(iobase, 3);
|
|
ResetChip(iobase, 4);
|
|
|
|
EnAllInt(iobase, ON);
|
|
EnTXDMA(iobase, ON);
|
|
EnRXDMA(iobase, OFF);
|
|
|
|
irda_setup_dma(self->io.dma, self->tx_buff_dma, self->tx_buff.len,
|
|
DMA_TX_MODE);
|
|
|
|
SetSendByte(iobase, self->tx_buff.len);
|
|
RXStart(iobase, OFF);
|
|
TXStart(iobase, ON);
|
|
|
|
dev->trans_start = jiffies;
|
|
spin_unlock_irqrestore(&self->lock, flags);
|
|
dev_kfree_skb(skb);
|
|
return NETDEV_TX_OK;
|
|
}
|
|
|
|
static netdev_tx_t via_ircc_hard_xmit_fir(struct sk_buff *skb,
|
|
struct net_device *dev)
|
|
{
|
|
struct via_ircc_cb *self;
|
|
u16 iobase;
|
|
__u32 speed;
|
|
unsigned long flags;
|
|
|
|
self = netdev_priv(dev);
|
|
iobase = self->io.fir_base;
|
|
|
|
if (self->st_fifo.len)
|
|
return NETDEV_TX_OK;
|
|
if (self->chip_id == 0x3076)
|
|
iodelay(1500);
|
|
else
|
|
udelay(1500);
|
|
netif_stop_queue(dev);
|
|
speed = irda_get_next_speed(skb);
|
|
if ((speed != self->io.speed) && (speed != -1)) {
|
|
if (!skb->len) {
|
|
via_ircc_change_speed(self, speed);
|
|
dev->trans_start = jiffies;
|
|
dev_kfree_skb(skb);
|
|
return NETDEV_TX_OK;
|
|
} else
|
|
self->new_speed = speed;
|
|
}
|
|
spin_lock_irqsave(&self->lock, flags);
|
|
self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail;
|
|
self->tx_fifo.queue[self->tx_fifo.free].len = skb->len;
|
|
|
|
self->tx_fifo.tail += skb->len;
|
|
dev->stats.tx_bytes += skb->len;
|
|
skb_copy_from_linear_data(skb,
|
|
self->tx_fifo.queue[self->tx_fifo.free].start, skb->len);
|
|
self->tx_fifo.len++;
|
|
self->tx_fifo.free++;
|
|
//F01 if (self->tx_fifo.len == 1) {
|
|
via_ircc_dma_xmit(self, iobase);
|
|
//F01 }
|
|
//F01 if (self->tx_fifo.free < (MAX_TX_WINDOW -1 )) netif_wake_queue(self->netdev);
|
|
dev->trans_start = jiffies;
|
|
dev_kfree_skb(skb);
|
|
spin_unlock_irqrestore(&self->lock, flags);
|
|
return NETDEV_TX_OK;
|
|
|
|
}
|
|
|
|
static int via_ircc_dma_xmit(struct via_ircc_cb *self, u16 iobase)
|
|
{
|
|
EnTXDMA(iobase, OFF);
|
|
self->io.direction = IO_XMIT;
|
|
EnPhys(iobase, ON);
|
|
EnableTX(iobase, ON);
|
|
EnableRX(iobase, OFF);
|
|
ResetChip(iobase, 0);
|
|
ResetChip(iobase, 1);
|
|
ResetChip(iobase, 2);
|
|
ResetChip(iobase, 3);
|
|
ResetChip(iobase, 4);
|
|
EnAllInt(iobase, ON);
|
|
EnTXDMA(iobase, ON);
|
|
EnRXDMA(iobase, OFF);
|
|
irda_setup_dma(self->io.dma,
|
|
((u8 *)self->tx_fifo.queue[self->tx_fifo.ptr].start -
|
|
self->tx_buff.head) + self->tx_buff_dma,
|
|
self->tx_fifo.queue[self->tx_fifo.ptr].len, DMA_TX_MODE);
|
|
IRDA_DEBUG(1, "%s: tx_fifo.ptr=%x,len=%x,tx_fifo.len=%x..\n",
|
|
__func__, self->tx_fifo.ptr,
|
|
self->tx_fifo.queue[self->tx_fifo.ptr].len,
|
|
self->tx_fifo.len);
|
|
|
|
SetSendByte(iobase, self->tx_fifo.queue[self->tx_fifo.ptr].len);
|
|
RXStart(iobase, OFF);
|
|
TXStart(iobase, ON);
|
|
return 0;
|
|
|
|
}
|
|
|
|
/*
|
|
* Function via_ircc_dma_xmit_complete (self)
|
|
*
|
|
* The transfer of a frame in finished. This function will only be called
|
|
* by the interrupt handler
|
|
*
|
|
*/
|
|
static int via_ircc_dma_xmit_complete(struct via_ircc_cb *self)
|
|
{
|
|
int iobase;
|
|
int ret = TRUE;
|
|
u8 Tx_status;
|
|
|
|
IRDA_DEBUG(3, "%s()\n", __func__);
|
|
|
|
iobase = self->io.fir_base;
|
|
/* Disable DMA */
|
|
// DisableDmaChannel(self->io.dma);
|
|
/* Check for underrrun! */
|
|
/* Clear bit, by writing 1 into it */
|
|
Tx_status = GetTXStatus(iobase);
|
|
if (Tx_status & 0x08) {
|
|
self->netdev->stats.tx_errors++;
|
|
self->netdev->stats.tx_fifo_errors++;
|
|
hwreset(self);
|
|
// how to clear underrrun ?
|
|
} else {
|
|
self->netdev->stats.tx_packets++;
|
|
ResetChip(iobase, 3);
|
|
ResetChip(iobase, 4);
|
|
}
|
|
/* Check if we need to change the speed */
|
|
if (self->new_speed) {
|
|
via_ircc_change_speed(self, self->new_speed);
|
|
self->new_speed = 0;
|
|
}
|
|
|
|
/* Finished with this frame, so prepare for next */
|
|
if (IsFIROn(iobase)) {
|
|
if (self->tx_fifo.len) {
|
|
self->tx_fifo.len--;
|
|
self->tx_fifo.ptr++;
|
|
}
|
|
}
|
|
IRDA_DEBUG(1,
|
|
"%s: tx_fifo.len=%x ,tx_fifo.ptr=%x,tx_fifo.free=%x...\n",
|
|
__func__,
|
|
self->tx_fifo.len, self->tx_fifo.ptr, self->tx_fifo.free);
|
|
/* F01_S
|
|
// Any frames to be sent back-to-back?
|
|
if (self->tx_fifo.len) {
|
|
// Not finished yet!
|
|
via_ircc_dma_xmit(self, iobase);
|
|
ret = FALSE;
|
|
} else {
|
|
F01_E*/
|
|
// Reset Tx FIFO info
|
|
self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
|
|
self->tx_fifo.tail = self->tx_buff.head;
|
|
//F01 }
|
|
|
|
// Make sure we have room for more frames
|
|
//F01 if (self->tx_fifo.free < (MAX_TX_WINDOW -1 )) {
|
|
// Not busy transmitting anymore
|
|
// Tell the network layer, that we can accept more frames
|
|
netif_wake_queue(self->netdev);
|
|
//F01 }
|
|
return ret;
|
|
}
|
|
|
|
/*
|
|
* Function via_ircc_dma_receive (self)
|
|
*
|
|
* Set configuration for receive a frame.
|
|
*
|
|
*/
|
|
static int via_ircc_dma_receive(struct via_ircc_cb *self)
|
|
{
|
|
int iobase;
|
|
|
|
iobase = self->io.fir_base;
|
|
|
|
IRDA_DEBUG(3, "%s()\n", __func__);
|
|
|
|
self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
|
|
self->tx_fifo.tail = self->tx_buff.head;
|
|
self->RxDataReady = 0;
|
|
self->io.direction = IO_RECV;
|
|
self->rx_buff.data = self->rx_buff.head;
|
|
self->st_fifo.len = self->st_fifo.pending_bytes = 0;
|
|
self->st_fifo.tail = self->st_fifo.head = 0;
|
|
|
|
EnPhys(iobase, ON);
|
|
EnableTX(iobase, OFF);
|
|
EnableRX(iobase, ON);
|
|
|
|
ResetChip(iobase, 0);
|
|
ResetChip(iobase, 1);
|
|
ResetChip(iobase, 2);
|
|
ResetChip(iobase, 3);
|
|
ResetChip(iobase, 4);
|
|
|
|
EnAllInt(iobase, ON);
|
|
EnTXDMA(iobase, OFF);
|
|
EnRXDMA(iobase, ON);
|
|
irda_setup_dma(self->io.dma2, self->rx_buff_dma,
|
|
self->rx_buff.truesize, DMA_RX_MODE);
|
|
TXStart(iobase, OFF);
|
|
RXStart(iobase, ON);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Function via_ircc_dma_receive_complete (self)
|
|
*
|
|
* Controller Finished with receiving frames,
|
|
* and this routine is call by ISR
|
|
*
|
|
*/
|
|
static int via_ircc_dma_receive_complete(struct via_ircc_cb *self,
|
|
int iobase)
|
|
{
|
|
struct st_fifo *st_fifo;
|
|
struct sk_buff *skb;
|
|
int len, i;
|
|
u8 status = 0;
|
|
|
|
iobase = self->io.fir_base;
|
|
st_fifo = &self->st_fifo;
|
|
|
|
if (self->io.speed < 4000000) { //Speed below FIR
|
|
len = GetRecvByte(iobase, self);
|
|
skb = dev_alloc_skb(len + 1);
|
|
if (skb == NULL)
|
|
return FALSE;
|
|
// Make sure IP header gets aligned
|
|
skb_reserve(skb, 1);
|
|
skb_put(skb, len - 2);
|
|
if (self->chip_id == 0x3076) {
|
|
for (i = 0; i < len - 2; i++)
|
|
skb->data[i] = self->rx_buff.data[i * 2];
|
|
} else {
|
|
if (self->chip_id == 0x3096) {
|
|
for (i = 0; i < len - 2; i++)
|
|
skb->data[i] =
|
|
self->rx_buff.data[i];
|
|
}
|
|
}
|
|
// Move to next frame
|
|
self->rx_buff.data += len;
|
|
self->netdev->stats.rx_bytes += len;
|
|
self->netdev->stats.rx_packets++;
|
|
skb->dev = self->netdev;
|
|
skb_reset_mac_header(skb);
|
|
skb->protocol = htons(ETH_P_IRDA);
|
|
netif_rx(skb);
|
|
return TRUE;
|
|
}
|
|
|
|
else { //FIR mode
|
|
len = GetRecvByte(iobase, self);
|
|
if (len == 0)
|
|
return TRUE; //interrupt only, data maybe move by RxT
|
|
if (((len - 4) < 2) || ((len - 4) > 2048)) {
|
|
IRDA_DEBUG(1, "%s(): Trouble:len=%x,CurCount=%x,LastCount=%x..\n",
|
|
__func__, len, RxCurCount(iobase, self),
|
|
self->RxLastCount);
|
|
hwreset(self);
|
|
return FALSE;
|
|
}
|
|
IRDA_DEBUG(2, "%s(): fifo.len=%x,len=%x,CurCount=%x..\n",
|
|
__func__,
|
|
st_fifo->len, len - 4, RxCurCount(iobase, self));
|
|
|
|
st_fifo->entries[st_fifo->tail].status = status;
|
|
st_fifo->entries[st_fifo->tail].len = len;
|
|
st_fifo->pending_bytes += len;
|
|
st_fifo->tail++;
|
|
st_fifo->len++;
|
|
if (st_fifo->tail > MAX_RX_WINDOW)
|
|
st_fifo->tail = 0;
|
|
self->RxDataReady = 0;
|
|
|
|
// It maybe have MAX_RX_WINDOW package receive by
|
|
// receive_complete before Timer IRQ
|
|
/* F01_S
|
|
if (st_fifo->len < (MAX_RX_WINDOW+2 )) {
|
|
RXStart(iobase,ON);
|
|
SetTimer(iobase,4);
|
|
}
|
|
else {
|
|
F01_E */
|
|
EnableRX(iobase, OFF);
|
|
EnRXDMA(iobase, OFF);
|
|
RXStart(iobase, OFF);
|
|
//F01_S
|
|
// Put this entry back in fifo
|
|
if (st_fifo->head > MAX_RX_WINDOW)
|
|
st_fifo->head = 0;
|
|
status = st_fifo->entries[st_fifo->head].status;
|
|
len = st_fifo->entries[st_fifo->head].len;
|
|
st_fifo->head++;
|
|
st_fifo->len--;
|
|
|
|
skb = dev_alloc_skb(len + 1 - 4);
|
|
/*
|
|
* if frame size, data ptr, or skb ptr are wrong, then get next
|
|
* entry.
|
|
*/
|
|
if ((skb == NULL) || (skb->data == NULL) ||
|
|
(self->rx_buff.data == NULL) || (len < 6)) {
|
|
self->netdev->stats.rx_dropped++;
|
|
kfree_skb(skb);
|
|
return TRUE;
|
|
}
|
|
skb_reserve(skb, 1);
|
|
skb_put(skb, len - 4);
|
|
|
|
skb_copy_to_linear_data(skb, self->rx_buff.data, len - 4);
|
|
IRDA_DEBUG(2, "%s(): len=%x.rx_buff=%p\n", __func__,
|
|
len - 4, self->rx_buff.data);
|
|
|
|
// Move to next frame
|
|
self->rx_buff.data += len;
|
|
self->netdev->stats.rx_bytes += len;
|
|
self->netdev->stats.rx_packets++;
|
|
skb->dev = self->netdev;
|
|
skb_reset_mac_header(skb);
|
|
skb->protocol = htons(ETH_P_IRDA);
|
|
netif_rx(skb);
|
|
|
|
//F01_E
|
|
} //FIR
|
|
return TRUE;
|
|
|
|
}
|
|
|
|
/*
|
|
* if frame is received , but no INT ,then use this routine to upload frame.
|
|
*/
|
|
static int upload_rxdata(struct via_ircc_cb *self, int iobase)
|
|
{
|
|
struct sk_buff *skb;
|
|
int len;
|
|
struct st_fifo *st_fifo;
|
|
st_fifo = &self->st_fifo;
|
|
|
|
len = GetRecvByte(iobase, self);
|
|
|
|
IRDA_DEBUG(2, "%s(): len=%x\n", __func__, len);
|
|
|
|
if ((len - 4) < 2) {
|
|
self->netdev->stats.rx_dropped++;
|
|
return FALSE;
|
|
}
|
|
|
|
skb = dev_alloc_skb(len + 1);
|
|
if (skb == NULL) {
|
|
self->netdev->stats.rx_dropped++;
|
|
return FALSE;
|
|
}
|
|
skb_reserve(skb, 1);
|
|
skb_put(skb, len - 4 + 1);
|
|
skb_copy_to_linear_data(skb, self->rx_buff.data, len - 4 + 1);
|
|
st_fifo->tail++;
|
|
st_fifo->len++;
|
|
if (st_fifo->tail > MAX_RX_WINDOW)
|
|
st_fifo->tail = 0;
|
|
// Move to next frame
|
|
self->rx_buff.data += len;
|
|
self->netdev->stats.rx_bytes += len;
|
|
self->netdev->stats.rx_packets++;
|
|
skb->dev = self->netdev;
|
|
skb_reset_mac_header(skb);
|
|
skb->protocol = htons(ETH_P_IRDA);
|
|
netif_rx(skb);
|
|
if (st_fifo->len < (MAX_RX_WINDOW + 2)) {
|
|
RXStart(iobase, ON);
|
|
} else {
|
|
EnableRX(iobase, OFF);
|
|
EnRXDMA(iobase, OFF);
|
|
RXStart(iobase, OFF);
|
|
}
|
|
return TRUE;
|
|
}
|
|
|
|
/*
|
|
* Implement back to back receive , use this routine to upload data.
|
|
*/
|
|
|
|
static int RxTimerHandler(struct via_ircc_cb *self, int iobase)
|
|
{
|
|
struct st_fifo *st_fifo;
|
|
struct sk_buff *skb;
|
|
int len;
|
|
u8 status;
|
|
|
|
st_fifo = &self->st_fifo;
|
|
|
|
if (CkRxRecv(iobase, self)) {
|
|
// if still receiving ,then return ,don't upload frame
|
|
self->RetryCount = 0;
|
|
SetTimer(iobase, 20);
|
|
self->RxDataReady++;
|
|
return FALSE;
|
|
} else
|
|
self->RetryCount++;
|
|
|
|
if ((self->RetryCount >= 1) ||
|
|
((st_fifo->pending_bytes + 2048) > self->rx_buff.truesize) ||
|
|
(st_fifo->len >= (MAX_RX_WINDOW))) {
|
|
while (st_fifo->len > 0) { //upload frame
|
|
// Put this entry back in fifo
|
|
if (st_fifo->head > MAX_RX_WINDOW)
|
|
st_fifo->head = 0;
|
|
status = st_fifo->entries[st_fifo->head].status;
|
|
len = st_fifo->entries[st_fifo->head].len;
|
|
st_fifo->head++;
|
|
st_fifo->len--;
|
|
|
|
skb = dev_alloc_skb(len + 1 - 4);
|
|
/*
|
|
* if frame size, data ptr, or skb ptr are wrong,
|
|
* then get next entry.
|
|
*/
|
|
if ((skb == NULL) || (skb->data == NULL) ||
|
|
(self->rx_buff.data == NULL) || (len < 6)) {
|
|
self->netdev->stats.rx_dropped++;
|
|
continue;
|
|
}
|
|
skb_reserve(skb, 1);
|
|
skb_put(skb, len - 4);
|
|
skb_copy_to_linear_data(skb, self->rx_buff.data, len - 4);
|
|
|
|
IRDA_DEBUG(2, "%s(): len=%x.head=%x\n", __func__,
|
|
len - 4, st_fifo->head);
|
|
|
|
// Move to next frame
|
|
self->rx_buff.data += len;
|
|
self->netdev->stats.rx_bytes += len;
|
|
self->netdev->stats.rx_packets++;
|
|
skb->dev = self->netdev;
|
|
skb_reset_mac_header(skb);
|
|
skb->protocol = htons(ETH_P_IRDA);
|
|
netif_rx(skb);
|
|
} //while
|
|
self->RetryCount = 0;
|
|
|
|
IRDA_DEBUG(2,
|
|
"%s(): End of upload HostStatus=%x,RxStatus=%x\n",
|
|
__func__,
|
|
GetHostStatus(iobase), GetRXStatus(iobase));
|
|
|
|
/*
|
|
* if frame is receive complete at this routine ,then upload
|
|
* frame.
|
|
*/
|
|
if ((GetRXStatus(iobase) & 0x10) &&
|
|
(RxCurCount(iobase, self) != self->RxLastCount)) {
|
|
upload_rxdata(self, iobase);
|
|
if (irda_device_txqueue_empty(self->netdev))
|
|
via_ircc_dma_receive(self);
|
|
}
|
|
} // timer detect complete
|
|
else
|
|
SetTimer(iobase, 4);
|
|
return TRUE;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
* Function via_ircc_interrupt (irq, dev_id)
|
|
*
|
|
* An interrupt from the chip has arrived. Time to do some work
|
|
*
|
|
*/
|
|
static irqreturn_t via_ircc_interrupt(int dummy, void *dev_id)
|
|
{
|
|
struct net_device *dev = dev_id;
|
|
struct via_ircc_cb *self = netdev_priv(dev);
|
|
int iobase;
|
|
u8 iHostIntType, iRxIntType, iTxIntType;
|
|
|
|
iobase = self->io.fir_base;
|
|
spin_lock(&self->lock);
|
|
iHostIntType = GetHostStatus(iobase);
|
|
|
|
IRDA_DEBUG(4, "%s(): iHostIntType %02x: %s %s %s %02x\n",
|
|
__func__, iHostIntType,
|
|
(iHostIntType & 0x40) ? "Timer" : "",
|
|
(iHostIntType & 0x20) ? "Tx" : "",
|
|
(iHostIntType & 0x10) ? "Rx" : "",
|
|
(iHostIntType & 0x0e) >> 1);
|
|
|
|
if ((iHostIntType & 0x40) != 0) { //Timer Event
|
|
self->EventFlag.TimeOut++;
|
|
ClearTimerInt(iobase, 1);
|
|
if (self->io.direction == IO_XMIT) {
|
|
via_ircc_dma_xmit(self, iobase);
|
|
}
|
|
if (self->io.direction == IO_RECV) {
|
|
/*
|
|
* frame ready hold too long, must reset.
|
|
*/
|
|
if (self->RxDataReady > 30) {
|
|
hwreset(self);
|
|
if (irda_device_txqueue_empty(self->netdev)) {
|
|
via_ircc_dma_receive(self);
|
|
}
|
|
} else { // call this to upload frame.
|
|
RxTimerHandler(self, iobase);
|
|
}
|
|
} //RECV
|
|
} //Timer Event
|
|
if ((iHostIntType & 0x20) != 0) { //Tx Event
|
|
iTxIntType = GetTXStatus(iobase);
|
|
|
|
IRDA_DEBUG(4, "%s(): iTxIntType %02x: %s %s %s %s\n",
|
|
__func__, iTxIntType,
|
|
(iTxIntType & 0x08) ? "FIFO underr." : "",
|
|
(iTxIntType & 0x04) ? "EOM" : "",
|
|
(iTxIntType & 0x02) ? "FIFO ready" : "",
|
|
(iTxIntType & 0x01) ? "Early EOM" : "");
|
|
|
|
if (iTxIntType & 0x4) {
|
|
self->EventFlag.EOMessage++; // read and will auto clean
|
|
if (via_ircc_dma_xmit_complete(self)) {
|
|
if (irda_device_txqueue_empty
|
|
(self->netdev)) {
|
|
via_ircc_dma_receive(self);
|
|
}
|
|
} else {
|
|
self->EventFlag.Unknown++;
|
|
}
|
|
} //EOP
|
|
} //Tx Event
|
|
//----------------------------------------
|
|
if ((iHostIntType & 0x10) != 0) { //Rx Event
|
|
/* Check if DMA has finished */
|
|
iRxIntType = GetRXStatus(iobase);
|
|
|
|
IRDA_DEBUG(4, "%s(): iRxIntType %02x: %s %s %s %s %s %s %s\n",
|
|
__func__, iRxIntType,
|
|
(iRxIntType & 0x80) ? "PHY err." : "",
|
|
(iRxIntType & 0x40) ? "CRC err" : "",
|
|
(iRxIntType & 0x20) ? "FIFO overr." : "",
|
|
(iRxIntType & 0x10) ? "EOF" : "",
|
|
(iRxIntType & 0x08) ? "RxData" : "",
|
|
(iRxIntType & 0x02) ? "RxMaxLen" : "",
|
|
(iRxIntType & 0x01) ? "SIR bad" : "");
|
|
if (!iRxIntType)
|
|
IRDA_DEBUG(3, "%s(): RxIRQ =0\n", __func__);
|
|
|
|
if (iRxIntType & 0x10) {
|
|
if (via_ircc_dma_receive_complete(self, iobase)) {
|
|
//F01 if(!(IsFIROn(iobase))) via_ircc_dma_receive(self);
|
|
via_ircc_dma_receive(self);
|
|
}
|
|
} // No ERR
|
|
else { //ERR
|
|
IRDA_DEBUG(4, "%s(): RxIRQ ERR:iRxIntType=%x,HostIntType=%x,CurCount=%x,RxLastCount=%x_____\n",
|
|
__func__, iRxIntType, iHostIntType,
|
|
RxCurCount(iobase, self),
|
|
self->RxLastCount);
|
|
|
|
if (iRxIntType & 0x20) { //FIFO OverRun ERR
|
|
ResetChip(iobase, 0);
|
|
ResetChip(iobase, 1);
|
|
} else { //PHY,CRC ERR
|
|
|
|
if (iRxIntType != 0x08)
|
|
hwreset(self); //F01
|
|
}
|
|
via_ircc_dma_receive(self);
|
|
} //ERR
|
|
|
|
} //Rx Event
|
|
spin_unlock(&self->lock);
|
|
return IRQ_RETVAL(iHostIntType);
|
|
}
|
|
|
|
static void hwreset(struct via_ircc_cb *self)
|
|
{
|
|
int iobase;
|
|
iobase = self->io.fir_base;
|
|
|
|
IRDA_DEBUG(3, "%s()\n", __func__);
|
|
|
|
ResetChip(iobase, 5);
|
|
EnableDMA(iobase, OFF);
|
|
EnableTX(iobase, OFF);
|
|
EnableRX(iobase, OFF);
|
|
EnRXDMA(iobase, OFF);
|
|
EnTXDMA(iobase, OFF);
|
|
RXStart(iobase, OFF);
|
|
TXStart(iobase, OFF);
|
|
InitCard(iobase);
|
|
CommonInit(iobase);
|
|
SIRFilter(iobase, ON);
|
|
SetSIR(iobase, ON);
|
|
CRC16(iobase, ON);
|
|
EnTXCRC(iobase, 0);
|
|
WriteReg(iobase, I_ST_CT_0, 0x00);
|
|
SetBaudRate(iobase, 9600);
|
|
SetPulseWidth(iobase, 12);
|
|
SetSendPreambleCount(iobase, 0);
|
|
WriteReg(iobase, I_ST_CT_0, 0x80);
|
|
|
|
/* Restore speed. */
|
|
via_ircc_change_speed(self, self->io.speed);
|
|
|
|
self->st_fifo.len = 0;
|
|
}
|
|
|
|
/*
|
|
* Function via_ircc_is_receiving (self)
|
|
*
|
|
* Return TRUE is we are currently receiving a frame
|
|
*
|
|
*/
|
|
static int via_ircc_is_receiving(struct via_ircc_cb *self)
|
|
{
|
|
int status = FALSE;
|
|
int iobase;
|
|
|
|
IRDA_ASSERT(self != NULL, return FALSE;);
|
|
|
|
iobase = self->io.fir_base;
|
|
if (CkRxRecv(iobase, self))
|
|
status = TRUE;
|
|
|
|
IRDA_DEBUG(2, "%s(): status=%x....\n", __func__, status);
|
|
|
|
return status;
|
|
}
|
|
|
|
|
|
/*
|
|
* Function via_ircc_net_open (dev)
|
|
*
|
|
* Start the device
|
|
*
|
|
*/
|
|
static int via_ircc_net_open(struct net_device *dev)
|
|
{
|
|
struct via_ircc_cb *self;
|
|
int iobase;
|
|
char hwname[32];
|
|
|
|
IRDA_DEBUG(3, "%s()\n", __func__);
|
|
|
|
IRDA_ASSERT(dev != NULL, return -1;);
|
|
self = netdev_priv(dev);
|
|
dev->stats.rx_packets = 0;
|
|
IRDA_ASSERT(self != NULL, return 0;);
|
|
iobase = self->io.fir_base;
|
|
if (request_irq(self->io.irq, via_ircc_interrupt, 0, dev->name, dev)) {
|
|
IRDA_WARNING("%s, unable to allocate irq=%d\n", driver_name,
|
|
self->io.irq);
|
|
return -EAGAIN;
|
|
}
|
|
/*
|
|
* Always allocate the DMA channel after the IRQ, and clean up on
|
|
* failure.
|
|
*/
|
|
if (request_dma(self->io.dma, dev->name)) {
|
|
IRDA_WARNING("%s, unable to allocate dma=%d\n", driver_name,
|
|
self->io.dma);
|
|
free_irq(self->io.irq, self);
|
|
return -EAGAIN;
|
|
}
|
|
if (self->io.dma2 != self->io.dma) {
|
|
if (request_dma(self->io.dma2, dev->name)) {
|
|
IRDA_WARNING("%s, unable to allocate dma2=%d\n",
|
|
driver_name, self->io.dma2);
|
|
free_irq(self->io.irq, self);
|
|
free_dma(self->io.dma);
|
|
return -EAGAIN;
|
|
}
|
|
}
|
|
|
|
|
|
/* turn on interrupts */
|
|
EnAllInt(iobase, ON);
|
|
EnInternalLoop(iobase, OFF);
|
|
EnExternalLoop(iobase, OFF);
|
|
|
|
/* */
|
|
via_ircc_dma_receive(self);
|
|
|
|
/* Ready to play! */
|
|
netif_start_queue(dev);
|
|
|
|
/*
|
|
* Open new IrLAP layer instance, now that everything should be
|
|
* initialized properly
|
|
*/
|
|
sprintf(hwname, "VIA @ 0x%x", iobase);
|
|
self->irlap = irlap_open(dev, &self->qos, hwname);
|
|
|
|
self->RxLastCount = 0;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Function via_ircc_net_close (dev)
|
|
*
|
|
* Stop the device
|
|
*
|
|
*/
|
|
static int via_ircc_net_close(struct net_device *dev)
|
|
{
|
|
struct via_ircc_cb *self;
|
|
int iobase;
|
|
|
|
IRDA_DEBUG(3, "%s()\n", __func__);
|
|
|
|
IRDA_ASSERT(dev != NULL, return -1;);
|
|
self = netdev_priv(dev);
|
|
IRDA_ASSERT(self != NULL, return 0;);
|
|
|
|
/* Stop device */
|
|
netif_stop_queue(dev);
|
|
/* Stop and remove instance of IrLAP */
|
|
if (self->irlap)
|
|
irlap_close(self->irlap);
|
|
self->irlap = NULL;
|
|
iobase = self->io.fir_base;
|
|
EnTXDMA(iobase, OFF);
|
|
EnRXDMA(iobase, OFF);
|
|
DisableDmaChannel(self->io.dma);
|
|
|
|
/* Disable interrupts */
|
|
EnAllInt(iobase, OFF);
|
|
free_irq(self->io.irq, dev);
|
|
free_dma(self->io.dma);
|
|
if (self->io.dma2 != self->io.dma)
|
|
free_dma(self->io.dma2);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Function via_ircc_net_ioctl (dev, rq, cmd)
|
|
*
|
|
* Process IOCTL commands for this device
|
|
*
|
|
*/
|
|
static int via_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq,
|
|
int cmd)
|
|
{
|
|
struct if_irda_req *irq = (struct if_irda_req *) rq;
|
|
struct via_ircc_cb *self;
|
|
unsigned long flags;
|
|
int ret = 0;
|
|
|
|
IRDA_ASSERT(dev != NULL, return -1;);
|
|
self = netdev_priv(dev);
|
|
IRDA_ASSERT(self != NULL, return -1;);
|
|
IRDA_DEBUG(1, "%s(), %s, (cmd=0x%X)\n", __func__, dev->name,
|
|
cmd);
|
|
/* Disable interrupts & save flags */
|
|
spin_lock_irqsave(&self->lock, flags);
|
|
switch (cmd) {
|
|
case SIOCSBANDWIDTH: /* Set bandwidth */
|
|
if (!capable(CAP_NET_ADMIN)) {
|
|
ret = -EPERM;
|
|
goto out;
|
|
}
|
|
via_ircc_change_speed(self, irq->ifr_baudrate);
|
|
break;
|
|
case SIOCSMEDIABUSY: /* Set media busy */
|
|
if (!capable(CAP_NET_ADMIN)) {
|
|
ret = -EPERM;
|
|
goto out;
|
|
}
|
|
irda_device_set_media_busy(self->netdev, TRUE);
|
|
break;
|
|
case SIOCGRECEIVING: /* Check if we are receiving right now */
|
|
irq->ifr_receiving = via_ircc_is_receiving(self);
|
|
break;
|
|
default:
|
|
ret = -EOPNOTSUPP;
|
|
}
|
|
out:
|
|
spin_unlock_irqrestore(&self->lock, flags);
|
|
return ret;
|
|
}
|
|
|
|
MODULE_AUTHOR("VIA Technologies,inc");
|
|
MODULE_DESCRIPTION("VIA IrDA Device Driver");
|
|
MODULE_LICENSE("GPL");
|
|
|
|
module_init(via_ircc_init);
|
|
module_exit(via_ircc_cleanup);
|