Zhang Rui bcfd218b66 perf/x86/rapl: Add support for Intel SPR platform ... Intel SPR platform uses fixed 16 bit energy unit for DRAM RAPL domain, and fixed 0 bit energy unit for Psys RAPL domain. After this, on SPR platform the energy counters appear in perf list. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Reviewed-by: Kan Liang <kan.liang@linux.intel.com> Acked-by: Len Brown <len.brown@intel.com> Link: https://lore.kernel.org/r/20200811153149.12242-4-rui.zhang@intel.com		2020-08-14 12:35:12 +02:00
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amd	x86/msr: Lift AMD family 0x15 power-specific MSRs	2020-06-15 19:25:53 +02:00
intel	perf/x86/intel/lbr: Support XSAVES for arch LBR read	2020-07-08 11:38:57 +02:00
zhaoxin	x86/perf: Fix a typo	2020-07-22 10:22:08 +02:00
core.c	perf/x86/intel/lbr: Support XSAVES for arch LBR read	2020-07-08 11:38:57 +02:00
Kconfig	treewide: replace '---help---' in Kconfig files with 'help'	2020-06-14 01:57:21 +09:00
Makefile	perf/x86/rapl: Fix RAPL config variable bug	2020-06-02 11:52:56 +02:00
msr.c	perf/x86/msr: Add Tremont support	2020-02-11 13:17:50 +01:00
perf_event.h	perf/x86/intel/lbr: Support XSAVES for arch LBR read	2020-07-08 11:38:57 +02:00
probe.c	perf/x86/rapl: Make perf_probe_msr() more robust and flexible	2020-05-28 07:58:55 +02:00
probe.h	perf/x86: Add MSR probe interface	2019-06-24 19:28:31 +02:00
rapl.c	perf/x86/rapl: Add support for Intel SPR platform	2020-08-14 12:35:12 +02:00