linux/arch/mips/loongson
Huacai Chen 7546d2f48d MIPS: Loongson 3: Add serial port support
Loongson family machines has three types of serial port: PCI UART, LPC
UART and CPU internal UART. Loongson-2E and parts of Loongson-2F based
machines use PCI UART; most Loongson-2F based machines use LPC UART;
Loongson-2G/3A has both LPC and CPU UART but usually use CPU UART.

Port address of UARTs:
CPU UART: REG_BASE + OFFSET;
LPC UART: LIO1_BASE + OFFSET;
PCI UART: PCIIO_BASE + OFFSET.

Since LPC UART are linked in "Local Bus", both CPU UART and LPC UART
are called "CPU provided serial port".

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Hongliang Tao <taohl@lemote.com>
Signed-off-by: Hua Yan <yanh@lemote.com>
Tested-by: Alex Smith <alex.smith@imgtec.com>
Reviewed-by: Alex Smith <alex.smith@imgtec.com>
Cc: John Crispin <john@phrozen.org>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/6635
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-31 18:17:12 +02:00
..
common MIPS: Loongson 3: Add serial port support 2014-03-31 18:17:12 +02:00
fuloong-2e MIPS: Whitespace cleanup. 2013-02-01 10:00:22 +01:00
lemote-2f mips: delete non-required instances of include <linux/init.h> 2014-01-24 22:39:56 +01:00
loongson-3 MIPS: Loongson 3: Add IRQ init and dispatch support 2014-03-31 18:17:12 +02:00
Kconfig MIPS: Loongson 2: Sort out clock managment. 2012-08-01 18:10:06 +02:00
Makefile MIPS: Loongson 3: Add IRQ init and dispatch support 2014-03-31 18:17:12 +02:00
Platform MIPS: Loongson: Migrate makefile to new Platform file 2010-08-05 13:25:45 +01:00