linux/arch/riscv/boot
Krzysztof Kozlowski 73d3c44115 riscv: dts: microchip: add missing compatibles for clint and plic
The Microchip Icicle kit uses SiFive E51 and U54 cores, so it looks that
also Core Local Interruptor and Platform-Level Interrupt Controller are
coming from SiFive.  Add proper compatibles to silence dtbs_check
warnings:

  clint@2000000: compatible:0: 'sifive,clint0' is not one of ['sifive,fu540-c000-clint', 'canaan,k210-clint']
  interrupt-controller@c000000: compatible:0: 'sifive,plic-1.0.0' is not one of ['sifive,fu540-c000-plic', 'canaan,k210-plic']

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20210920130412.145231-1-krzysztof.kozlowski@canonical.com
2021-10-19 10:59:57 +02:00
..
dts riscv: dts: microchip: add missing compatibles for clint and plic 2021-10-19 10:59:57 +02:00
.gitignore riscv: Ignore Image.* and loader.bin 2020-11-09 11:54:46 -08:00
install.sh
loader.lds.S riscv: Move kernel mapping outside of linear mapping 2021-04-26 08:25:04 -07:00
loader.S riscv: provide a flat image loader 2019-11-17 15:17:39 -08:00
Makefile riscv: move the (z)install rules to arch/riscv/Makefile 2021-09-10 23:08:26 -07:00