forked from Minki/linux
404bfb78da
Add support for the Host1x unit to be located behind an IOMMU. This is required when gather buffers may be allocated non-contiguously in physical memory, as can be the case when TegraDRM is also using the IOMMU. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
103 lines
3.6 KiB
C
103 lines
3.6 KiB
C
/*
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* Tegra host1x Command DMA
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*
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* Copyright (c) 2010-2013, NVIDIA Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __HOST1X_CDMA_H
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#define __HOST1X_CDMA_H
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#include <linux/sched.h>
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#include <linux/semaphore.h>
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#include <linux/list.h>
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struct host1x_syncpt;
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struct host1x_userctx_timeout;
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struct host1x_job;
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/*
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* cdma
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*
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* This is in charge of a host command DMA channel.
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* Sends ops to a push buffer, and takes responsibility for unpinning
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* (& possibly freeing) of memory after those ops have completed.
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* Producer:
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* begin
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* push - send ops to the push buffer
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* end - start command DMA and enqueue handles to be unpinned
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* Consumer:
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* update - call to update sync queue and push buffer, unpin memory
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*/
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struct push_buffer {
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void *mapped; /* mapped pushbuffer memory */
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dma_addr_t dma; /* device address of pushbuffer */
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phys_addr_t phys; /* physical address of pushbuffer */
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u32 fence; /* index we've written */
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u32 pos; /* index to write to */
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u32 size;
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u32 alloc_size;
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};
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struct buffer_timeout {
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struct delayed_work wq; /* work queue */
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bool initialized; /* timer one-time setup flag */
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struct host1x_syncpt *syncpt; /* buffer completion syncpt */
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u32 syncpt_val; /* syncpt value when completed */
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ktime_t start_ktime; /* starting time */
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/* context timeout information */
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int client;
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};
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enum cdma_event {
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CDMA_EVENT_NONE, /* not waiting for any event */
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CDMA_EVENT_SYNC_QUEUE_EMPTY, /* wait for empty sync queue */
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CDMA_EVENT_PUSH_BUFFER_SPACE /* wait for space in push buffer */
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};
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struct host1x_cdma {
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struct mutex lock; /* controls access to shared state */
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struct semaphore sem; /* signalled when event occurs */
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enum cdma_event event; /* event that sem is waiting for */
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unsigned int slots_used; /* pb slots used in current submit */
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unsigned int slots_free; /* pb slots free in current submit */
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unsigned int first_get; /* DMAGET value, where submit begins */
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unsigned int last_pos; /* last value written to DMAPUT */
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struct push_buffer push_buffer; /* channel's push buffer */
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struct list_head sync_queue; /* job queue */
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struct buffer_timeout timeout; /* channel's timeout state/wq */
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bool running;
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bool torndown;
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};
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#define cdma_to_channel(cdma) container_of(cdma, struct host1x_channel, cdma)
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#define cdma_to_host1x(cdma) dev_get_drvdata(cdma_to_channel(cdma)->dev->parent)
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#define pb_to_cdma(pb) container_of(pb, struct host1x_cdma, push_buffer)
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int host1x_cdma_init(struct host1x_cdma *cdma);
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int host1x_cdma_deinit(struct host1x_cdma *cdma);
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void host1x_cdma_stop(struct host1x_cdma *cdma);
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int host1x_cdma_begin(struct host1x_cdma *cdma, struct host1x_job *job);
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void host1x_cdma_push(struct host1x_cdma *cdma, u32 op1, u32 op2);
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void host1x_cdma_end(struct host1x_cdma *cdma, struct host1x_job *job);
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void host1x_cdma_update(struct host1x_cdma *cdma);
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void host1x_cdma_peek(struct host1x_cdma *cdma, u32 dmaget, int slot,
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u32 *out);
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unsigned int host1x_cdma_wait_locked(struct host1x_cdma *cdma,
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enum cdma_event event);
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void host1x_cdma_update_sync_queue(struct host1x_cdma *cdma,
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struct device *dev);
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#endif
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