forked from Minki/linux
44d51a029f
* 'davinci-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci: davinci: dm646x EVM: Specify reserved EDMA channel/slots davinci: da8xx/omapl EVM: Specify reserved channels/slots davinci: support for EDMA resource sharing davinci: edma: provide ability to detect insufficient CC info data davinci: da8xx: sparse cleanup: remove duplicate entries in irq priorities davinci: DM365: fixed second serial port Davinci: tnetv107x evm board initial support Davinci: tnetv107x initial gpio support Davinci: tnetv107x soc support Davinci: tnetv107x decompresser uart definitions Davinci: generalized debug macros
608 lines
15 KiB
C
608 lines
15 KiB
C
/*
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* TI DA830/OMAP L137 EVM board
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*
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* Author: Mark A. Greer <mgreer@mvista.com>
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* Derived from: arch/arm/mach-davinci/board-dm644x-evm.c
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*
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* 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/console.h>
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#include <linux/interrupt.h>
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#include <linux/gpio.h>
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#include <linux/platform_device.h>
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#include <linux/i2c.h>
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#include <linux/i2c/pcf857x.h>
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#include <linux/i2c/at24.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <mach/cp_intc.h>
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#include <mach/mux.h>
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#include <mach/nand.h>
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#include <mach/da8xx.h>
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#include <mach/usb.h>
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#define DA830_EVM_PHY_MASK 0x0
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#define DA830_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
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/*
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* USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
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*/
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#define ON_BD_USB_DRV GPIO_TO_PIN(1, 15)
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#define ON_BD_USB_OVC GPIO_TO_PIN(2, 4)
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static const short da830_evm_usb11_pins[] = {
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DA830_GPIO1_15, DA830_GPIO2_4,
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-1
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};
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static da8xx_ocic_handler_t da830_evm_usb_ocic_handler;
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static int da830_evm_usb_set_power(unsigned port, int on)
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{
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gpio_set_value(ON_BD_USB_DRV, on);
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return 0;
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}
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static int da830_evm_usb_get_power(unsigned port)
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{
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return gpio_get_value(ON_BD_USB_DRV);
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}
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static int da830_evm_usb_get_oci(unsigned port)
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{
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return !gpio_get_value(ON_BD_USB_OVC);
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}
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static irqreturn_t da830_evm_usb_ocic_irq(int, void *);
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static int da830_evm_usb_ocic_notify(da8xx_ocic_handler_t handler)
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{
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int irq = gpio_to_irq(ON_BD_USB_OVC);
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int error = 0;
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if (handler != NULL) {
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da830_evm_usb_ocic_handler = handler;
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error = request_irq(irq, da830_evm_usb_ocic_irq, IRQF_DISABLED |
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IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
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"OHCI over-current indicator", NULL);
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if (error)
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printk(KERN_ERR "%s: could not request IRQ to watch "
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"over-current indicator changes\n", __func__);
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} else
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free_irq(irq, NULL);
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return error;
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}
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static struct da8xx_ohci_root_hub da830_evm_usb11_pdata = {
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.set_power = da830_evm_usb_set_power,
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.get_power = da830_evm_usb_get_power,
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.get_oci = da830_evm_usb_get_oci,
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.ocic_notify = da830_evm_usb_ocic_notify,
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/* TPS2065 switch @ 5V */
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.potpgt = (3 + 1) / 2, /* 3 ms max */
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};
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static irqreturn_t da830_evm_usb_ocic_irq(int irq, void *dev_id)
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{
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da830_evm_usb_ocic_handler(&da830_evm_usb11_pdata, 1);
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return IRQ_HANDLED;
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}
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static __init void da830_evm_usb_init(void)
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{
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u32 cfgchip2;
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int ret;
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/*
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* Set up USB clock/mode in the CFGCHIP2 register.
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* FYI: CFGCHIP2 is 0x0000ef00 initially.
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*/
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cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
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/* USB2.0 PHY reference clock is 24 MHz */
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cfgchip2 &= ~CFGCHIP2_REFFREQ;
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cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ;
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/*
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* Select internal reference clock for USB 2.0 PHY
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* and use it as a clock source for USB 1.1 PHY
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* (this is the default setting anyway).
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*/
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cfgchip2 &= ~CFGCHIP2_USB1PHYCLKMUX;
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cfgchip2 |= CFGCHIP2_USB2PHYCLKMUX;
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/*
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* We have to override VBUS/ID signals when MUSB is configured into the
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* host-only mode -- ID pin will float if no cable is connected, so the
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* controller won't be able to drive VBUS thinking that it's a B-device.
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* Otherwise, we want to use the OTG mode and enable VBUS comparators.
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*/
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cfgchip2 &= ~CFGCHIP2_OTGMODE;
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#ifdef CONFIG_USB_MUSB_HOST
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cfgchip2 |= CFGCHIP2_FORCE_HOST;
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#else
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cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN;
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#endif
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__raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
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/* USB_REFCLKIN is not used. */
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ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
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if (ret)
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pr_warning("%s: USB 2.0 PinMux setup failed: %d\n",
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__func__, ret);
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else {
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/*
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* TPS2065 switch @ 5V supplies 1 A (sustains 1.5 A),
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* with the power on to power good time of 3 ms.
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*/
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ret = da8xx_register_usb20(1000, 3);
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if (ret)
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pr_warning("%s: USB 2.0 registration failed: %d\n",
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__func__, ret);
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}
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ret = davinci_cfg_reg_list(da830_evm_usb11_pins);
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if (ret) {
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pr_warning("%s: USB 1.1 PinMux setup failed: %d\n",
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__func__, ret);
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return;
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}
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ret = gpio_request(ON_BD_USB_DRV, "ON_BD_USB_DRV");
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if (ret) {
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printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
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"power control: %d\n", __func__, ret);
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return;
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}
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gpio_direction_output(ON_BD_USB_DRV, 0);
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ret = gpio_request(ON_BD_USB_OVC, "ON_BD_USB_OVC");
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if (ret) {
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printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
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"over-current indicator: %d\n", __func__, ret);
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return;
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}
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gpio_direction_input(ON_BD_USB_OVC);
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ret = da8xx_register_usb11(&da830_evm_usb11_pdata);
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if (ret)
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pr_warning("%s: USB 1.1 registration failed: %d\n",
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__func__, ret);
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}
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static struct davinci_uart_config da830_evm_uart_config __initdata = {
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.enabled_uarts = 0x7,
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};
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static const short da830_evm_mcasp1_pins[] = {
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DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, DA830_AHCLKR1, DA830_AFSR1,
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DA830_AMUTE1, DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_5,
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DA830_ACLKR1, DA830_AXR1_6, DA830_AXR1_7, DA830_AXR1_8, DA830_AXR1_10,
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DA830_AXR1_11,
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-1
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};
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static u8 da830_iis_serializer_direction[] = {
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RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
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INACTIVE_MODE, TX_MODE, INACTIVE_MODE, INACTIVE_MODE,
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INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
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};
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static struct snd_platform_data da830_evm_snd_data = {
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.tx_dma_offset = 0x2000,
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.rx_dma_offset = 0x2000,
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.op_mode = DAVINCI_MCASP_IIS_MODE,
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.num_serializer = ARRAY_SIZE(da830_iis_serializer_direction),
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.tdm_slots = 2,
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.serial_dir = da830_iis_serializer_direction,
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.asp_chan_q = EVENTQ_0,
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.version = MCASP_VERSION_2,
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.txnumevt = 1,
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.rxnumevt = 1,
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};
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/*
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* GPIO2[1] is used as MMC_SD_WP and GPIO2[2] as MMC_SD_INS.
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*/
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static const short da830_evm_mmc_sd_pins[] = {
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DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2,
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DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5,
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DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK,
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DA830_MMCSD_CMD, DA830_GPIO2_1, DA830_GPIO2_2,
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-1
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};
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#define DA830_MMCSD_WP_PIN GPIO_TO_PIN(2, 1)
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#define DA830_MMCSD_CD_PIN GPIO_TO_PIN(2, 2)
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static int da830_evm_mmc_get_ro(int index)
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{
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return gpio_get_value(DA830_MMCSD_WP_PIN);
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}
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static int da830_evm_mmc_get_cd(int index)
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{
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return !gpio_get_value(DA830_MMCSD_CD_PIN);
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}
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static struct davinci_mmc_config da830_evm_mmc_config = {
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.get_ro = da830_evm_mmc_get_ro,
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.get_cd = da830_evm_mmc_get_cd,
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.wires = 8,
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.max_freq = 50000000,
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.caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
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.version = MMC_CTLR_VERSION_2,
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};
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static inline void da830_evm_init_mmc(void)
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{
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int ret;
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ret = davinci_cfg_reg_list(da830_evm_mmc_sd_pins);
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if (ret) {
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pr_warning("da830_evm_init: mmc/sd mux setup failed: %d\n",
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ret);
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return;
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}
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ret = gpio_request(DA830_MMCSD_WP_PIN, "MMC WP");
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if (ret) {
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pr_warning("da830_evm_init: can not open GPIO %d\n",
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DA830_MMCSD_WP_PIN);
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return;
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}
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gpio_direction_input(DA830_MMCSD_WP_PIN);
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ret = gpio_request(DA830_MMCSD_CD_PIN, "MMC CD\n");
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if (ret) {
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pr_warning("da830_evm_init: can not open GPIO %d\n",
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DA830_MMCSD_CD_PIN);
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return;
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}
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gpio_direction_input(DA830_MMCSD_CD_PIN);
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ret = da8xx_register_mmcsd0(&da830_evm_mmc_config);
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if (ret) {
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pr_warning("da830_evm_init: mmc/sd registration failed: %d\n",
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ret);
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gpio_free(DA830_MMCSD_WP_PIN);
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}
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}
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/*
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* UI board NAND/NOR flashes only use 8-bit data bus.
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*/
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static const short da830_evm_emif25_pins[] = {
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DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
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DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
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DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3,
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DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7,
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DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11,
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DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE,
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DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0,
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-1
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};
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#if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE)
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#define HAS_MMC 1
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#else
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#define HAS_MMC 0
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#endif
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#ifdef CONFIG_DA830_UI_NAND
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static struct mtd_partition da830_evm_nand_partitions[] = {
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/* bootloader (U-Boot, etc) in first sector */
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[0] = {
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.name = "bootloader",
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.offset = 0,
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.size = SZ_128K,
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.mask_flags = MTD_WRITEABLE, /* force read-only */
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},
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/* bootloader params in the next sector */
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[1] = {
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.name = "params",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_128K,
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.mask_flags = MTD_WRITEABLE, /* force read-only */
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},
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/* kernel */
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[2] = {
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.name = "kernel",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_2M,
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.mask_flags = 0,
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},
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/* file system */
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[3] = {
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.name = "filesystem",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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.mask_flags = 0,
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}
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};
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/* flash bbt decriptors */
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static uint8_t da830_evm_nand_bbt_pattern[] = { 'B', 'b', 't', '0' };
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static uint8_t da830_evm_nand_mirror_pattern[] = { '1', 't', 'b', 'B' };
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static struct nand_bbt_descr da830_evm_nand_bbt_main_descr = {
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.options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
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NAND_BBT_WRITE | NAND_BBT_2BIT |
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NAND_BBT_VERSION | NAND_BBT_PERCHIP,
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.offs = 2,
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.len = 4,
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.veroffs = 16,
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.maxblocks = 4,
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.pattern = da830_evm_nand_bbt_pattern
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};
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static struct nand_bbt_descr da830_evm_nand_bbt_mirror_descr = {
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.options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
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NAND_BBT_WRITE | NAND_BBT_2BIT |
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NAND_BBT_VERSION | NAND_BBT_PERCHIP,
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.offs = 2,
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.len = 4,
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.veroffs = 16,
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.maxblocks = 4,
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.pattern = da830_evm_nand_mirror_pattern
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};
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static struct davinci_nand_pdata da830_evm_nand_pdata = {
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.parts = da830_evm_nand_partitions,
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.nr_parts = ARRAY_SIZE(da830_evm_nand_partitions),
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.ecc_mode = NAND_ECC_HW,
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.ecc_bits = 4,
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.options = NAND_USE_FLASH_BBT,
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.bbt_td = &da830_evm_nand_bbt_main_descr,
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.bbt_md = &da830_evm_nand_bbt_mirror_descr,
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};
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static struct resource da830_evm_nand_resources[] = {
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[0] = { /* First memory resource is NAND I/O window */
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.start = DA8XX_AEMIF_CS3_BASE,
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.end = DA8XX_AEMIF_CS3_BASE + PAGE_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = { /* Second memory resource is AEMIF control registers */
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.start = DA8XX_AEMIF_CTL_BASE,
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.end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device da830_evm_nand_device = {
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.name = "davinci_nand",
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.id = 1,
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.dev = {
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.platform_data = &da830_evm_nand_pdata,
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},
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.num_resources = ARRAY_SIZE(da830_evm_nand_resources),
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.resource = da830_evm_nand_resources,
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};
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static inline void da830_evm_init_nand(int mux_mode)
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{
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int ret;
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if (HAS_MMC) {
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pr_warning("WARNING: both MMC/SD and NAND are "
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"enabled, but they share AEMIF pins.\n"
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"\tDisable MMC/SD for NAND support.\n");
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return;
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}
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ret = davinci_cfg_reg_list(da830_evm_emif25_pins);
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if (ret)
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pr_warning("da830_evm_init: emif25 mux setup failed: %d\n",
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ret);
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ret = platform_device_register(&da830_evm_nand_device);
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if (ret)
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pr_warning("da830_evm_init: NAND device not registered.\n");
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gpio_direction_output(mux_mode, 1);
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}
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#else
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static inline void da830_evm_init_nand(int mux_mode) { }
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#endif
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#ifdef CONFIG_DA830_UI_LCD
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static inline void da830_evm_init_lcdc(int mux_mode)
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{
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int ret;
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ret = davinci_cfg_reg_list(da830_lcdcntl_pins);
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if (ret)
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pr_warning("da830_evm_init: lcdcntl mux setup failed: %d\n",
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ret);
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ret = da8xx_register_lcdc(&sharp_lcd035q3dg01_pdata);
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if (ret)
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pr_warning("da830_evm_init: lcd setup failed: %d\n", ret);
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gpio_direction_output(mux_mode, 0);
|
|
}
|
|
#else
|
|
static inline void da830_evm_init_lcdc(int mux_mode) { }
|
|
#endif
|
|
|
|
static struct at24_platform_data da830_evm_i2c_eeprom_info = {
|
|
.byte_len = SZ_256K / 8,
|
|
.page_size = 64,
|
|
.flags = AT24_FLAG_ADDR16,
|
|
.setup = davinci_get_mac_addr,
|
|
.context = (void *)0x7f00,
|
|
};
|
|
|
|
static int __init da830_evm_ui_expander_setup(struct i2c_client *client,
|
|
int gpio, unsigned ngpio, void *context)
|
|
{
|
|
gpio_request(gpio + 6, "UI MUX_MODE");
|
|
|
|
/* Drive mux mode low to match the default without UI card */
|
|
gpio_direction_output(gpio + 6, 0);
|
|
|
|
da830_evm_init_lcdc(gpio + 6);
|
|
|
|
da830_evm_init_nand(gpio + 6);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio,
|
|
unsigned ngpio, void *context)
|
|
{
|
|
gpio_free(gpio + 6);
|
|
return 0;
|
|
}
|
|
|
|
static struct pcf857x_platform_data __initdata da830_evm_ui_expander_info = {
|
|
.gpio_base = DAVINCI_N_GPIO,
|
|
.setup = da830_evm_ui_expander_setup,
|
|
.teardown = da830_evm_ui_expander_teardown,
|
|
};
|
|
|
|
static struct i2c_board_info __initdata da830_evm_i2c_devices[] = {
|
|
{
|
|
I2C_BOARD_INFO("24c256", 0x50),
|
|
.platform_data = &da830_evm_i2c_eeprom_info,
|
|
},
|
|
{
|
|
I2C_BOARD_INFO("tlv320aic3x", 0x18),
|
|
},
|
|
{
|
|
I2C_BOARD_INFO("pcf8574", 0x3f),
|
|
.platform_data = &da830_evm_ui_expander_info,
|
|
},
|
|
};
|
|
|
|
static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = {
|
|
.bus_freq = 100, /* kHz */
|
|
.bus_delay = 0, /* usec */
|
|
};
|
|
|
|
/*
|
|
* The following EDMA channels/slots are not being used by drivers (for
|
|
* example: Timer, GPIO, UART events etc) on da830/omap-l137 EVM, hence
|
|
* they are being reserved for codecs on the DSP side.
|
|
*/
|
|
static const s16 da830_dma_rsv_chans[][2] = {
|
|
/* (offset, number) */
|
|
{ 8, 2},
|
|
{12, 2},
|
|
{24, 4},
|
|
{30, 2},
|
|
{-1, -1}
|
|
};
|
|
|
|
static const s16 da830_dma_rsv_slots[][2] = {
|
|
/* (offset, number) */
|
|
{ 8, 2},
|
|
{12, 2},
|
|
{24, 4},
|
|
{30, 26},
|
|
{-1, -1}
|
|
};
|
|
|
|
static struct edma_rsv_info da830_edma_rsv[] = {
|
|
{
|
|
.rsv_chans = da830_dma_rsv_chans,
|
|
.rsv_slots = da830_dma_rsv_slots,
|
|
},
|
|
};
|
|
|
|
static __init void da830_evm_init(void)
|
|
{
|
|
struct davinci_soc_info *soc_info = &davinci_soc_info;
|
|
int ret;
|
|
|
|
ret = da830_register_edma(da830_edma_rsv);
|
|
if (ret)
|
|
pr_warning("da830_evm_init: edma registration failed: %d\n",
|
|
ret);
|
|
|
|
ret = davinci_cfg_reg_list(da830_i2c0_pins);
|
|
if (ret)
|
|
pr_warning("da830_evm_init: i2c0 mux setup failed: %d\n",
|
|
ret);
|
|
|
|
ret = da8xx_register_i2c(0, &da830_evm_i2c_0_pdata);
|
|
if (ret)
|
|
pr_warning("da830_evm_init: i2c0 registration failed: %d\n",
|
|
ret);
|
|
|
|
da830_evm_usb_init();
|
|
|
|
soc_info->emac_pdata->phy_mask = DA830_EVM_PHY_MASK;
|
|
soc_info->emac_pdata->mdio_max_freq = DA830_EVM_MDIO_FREQUENCY;
|
|
soc_info->emac_pdata->rmii_en = 1;
|
|
|
|
ret = davinci_cfg_reg_list(da830_cpgmac_pins);
|
|
if (ret)
|
|
pr_warning("da830_evm_init: cpgmac mux setup failed: %d\n",
|
|
ret);
|
|
|
|
ret = da8xx_register_emac();
|
|
if (ret)
|
|
pr_warning("da830_evm_init: emac registration failed: %d\n",
|
|
ret);
|
|
|
|
ret = da8xx_register_watchdog();
|
|
if (ret)
|
|
pr_warning("da830_evm_init: watchdog registration failed: %d\n",
|
|
ret);
|
|
|
|
davinci_serial_init(&da830_evm_uart_config);
|
|
i2c_register_board_info(1, da830_evm_i2c_devices,
|
|
ARRAY_SIZE(da830_evm_i2c_devices));
|
|
|
|
ret = davinci_cfg_reg_list(da830_evm_mcasp1_pins);
|
|
if (ret)
|
|
pr_warning("da830_evm_init: mcasp1 mux setup failed: %d\n",
|
|
ret);
|
|
|
|
da8xx_register_mcasp(1, &da830_evm_snd_data);
|
|
|
|
da830_evm_init_mmc();
|
|
|
|
ret = da8xx_register_rtc();
|
|
if (ret)
|
|
pr_warning("da830_evm_init: rtc setup failed: %d\n", ret);
|
|
}
|
|
|
|
#ifdef CONFIG_SERIAL_8250_CONSOLE
|
|
static int __init da830_evm_console_init(void)
|
|
{
|
|
return add_preferred_console("ttyS", 2, "115200");
|
|
}
|
|
console_initcall(da830_evm_console_init);
|
|
#endif
|
|
|
|
static void __init da830_evm_map_io(void)
|
|
{
|
|
da830_init();
|
|
}
|
|
|
|
MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137 EVM")
|
|
.phys_io = IO_PHYS,
|
|
.io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
|
|
.boot_params = (DA8XX_DDR_BASE + 0x100),
|
|
.map_io = da830_evm_map_io,
|
|
.init_irq = cp_intc_init,
|
|
.timer = &davinci_timer,
|
|
.init_machine = da830_evm_init,
|
|
MACHINE_END
|