linux/arch/arm/boot/dts/imx6q-sabreauto.dts
Huang Shijie 72eb4cca78 ARM: dts: imx6q{dl}: fix the pin conflict between SPI and WEIM
In the imx6q-sabreauto and imx6dl-sabreauto boards,
the pin MX6Q{DL}_PAD_EIM_D19 is used as a GPIO for SPI NOR, but
it is used as a data pin for the WEIM NOR.

In order to fix the conflict, this patch removes the pin from the hog,
and adds a new board-level pinctrl: pinctrl_ecspi1_sabreauto.

The SPI NOR selects this pinctrl_ecspi1_sabreauto when it is enabled.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17 16:04:29 +08:00

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/*
* Copyright 2012 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
#include "imx6q.dtsi"
#include "imx6qdl-sabreauto.dtsi"
/ {
model = "Freescale i.MX6 Quad SABRE Automotive Board";
compatible = "fsl,imx6q-sabreauto", "fsl,imx6q";
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
hog {
pinctrl_hog: hoggrp {
fsl,pins = <
MX6Q_PAD_NANDF_CS2__GPIO6_IO15 0x80000000
MX6Q_PAD_SD2_DAT2__GPIO1_IO13 0x80000000
>;
};
};
ecspi1 {
pinctrl_ecspi1_sabreauto: ecspi1-sabreauto {
fsl,pins = <
MX6Q_PAD_EIM_D19__GPIO3_IO19 0x80000000
>;
};
};
};