forked from Minki/linux
916cda1aa1
This adds a new system call to enable the use of guarded storage for
user space processes. The system call takes two arguments, a command
and pointer to a guarded storage control block:
s390_guarded_storage(int command, struct gs_cb *gs_cb);
The second argument is relevant only for the GS_SET_BC_CB command.
The commands in detail:
0 - GS_ENABLE
Enable the guarded storage facility for the current task. The
initial content of the guarded storage control block will be
all zeros. After the enablement the user space code can use
load-guarded-storage-controls instruction (LGSC) to load an
arbitrary control block. While a task is enabled the kernel
will save and restore the current content of the guarded
storage registers on context switch.
1 - GS_DISABLE
Disables the use of the guarded storage facility for the current
task. The kernel will cease to save and restore the content of
the guarded storage registers, the task specific content of
these registers is lost.
2 - GS_SET_BC_CB
Set a broadcast guarded storage control block. This is called
per thread and stores a specific guarded storage control block
in the task struct of the current task. This control block will
be used for the broadcast event GS_BROADCAST.
3 - GS_CLEAR_BC_CB
Clears the broadcast guarded storage control block. The guarded-
storage control block is removed from the task struct that was
established by GS_SET_BC_CB.
4 - GS_BROADCAST
Sends a broadcast to all thread siblings of the current task.
Every sibling that has established a broadcast guarded storage
control block will load this control block and will be enabled
for guarded storage. The broadcast guarded storage control block
is used up, a second broadcast without a refresh of the stored
control block with GS_SET_BC_CB will not have any effect.
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
384 lines
10 KiB
C
384 lines
10 KiB
C
/*
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* S390 version
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* Copyright IBM Corp. 1999
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* Author(s): Hartmut Penner (hp@de.ibm.com),
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* Martin Schwidefsky (schwidefsky@de.ibm.com)
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*
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* Derived from "include/asm-i386/processor.h"
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* Copyright (C) 1994, Linus Torvalds
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*/
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#ifndef __ASM_S390_PROCESSOR_H
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#define __ASM_S390_PROCESSOR_H
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#include <linux/const.h>
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#define CIF_MCCK_PENDING 0 /* machine check handling is pending */
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#define CIF_ASCE_PRIMARY 1 /* primary asce needs fixup / uaccess */
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#define CIF_ASCE_SECONDARY 2 /* secondary asce needs fixup / uaccess */
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#define CIF_NOHZ_DELAY 3 /* delay HZ disable for a tick */
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#define CIF_FPU 4 /* restore FPU registers */
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#define CIF_IGNORE_IRQ 5 /* ignore interrupt (for udelay) */
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#define CIF_ENABLED_WAIT 6 /* in enabled wait state */
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#define _CIF_MCCK_PENDING _BITUL(CIF_MCCK_PENDING)
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#define _CIF_ASCE_PRIMARY _BITUL(CIF_ASCE_PRIMARY)
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#define _CIF_ASCE_SECONDARY _BITUL(CIF_ASCE_SECONDARY)
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#define _CIF_NOHZ_DELAY _BITUL(CIF_NOHZ_DELAY)
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#define _CIF_FPU _BITUL(CIF_FPU)
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#define _CIF_IGNORE_IRQ _BITUL(CIF_IGNORE_IRQ)
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#define _CIF_ENABLED_WAIT _BITUL(CIF_ENABLED_WAIT)
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#ifndef __ASSEMBLY__
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#include <linux/linkage.h>
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#include <linux/irqflags.h>
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#include <asm/cpu.h>
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#include <asm/page.h>
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#include <asm/ptrace.h>
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#include <asm/setup.h>
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#include <asm/runtime_instr.h>
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#include <asm/fpu/types.h>
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#include <asm/fpu/internal.h>
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static inline void set_cpu_flag(int flag)
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{
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S390_lowcore.cpu_flags |= (1UL << flag);
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}
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static inline void clear_cpu_flag(int flag)
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{
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S390_lowcore.cpu_flags &= ~(1UL << flag);
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}
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static inline int test_cpu_flag(int flag)
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{
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return !!(S390_lowcore.cpu_flags & (1UL << flag));
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}
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/*
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* Test CIF flag of another CPU. The caller needs to ensure that
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* CPU hotplug can not happen, e.g. by disabling preemption.
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*/
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static inline int test_cpu_flag_of(int flag, int cpu)
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{
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struct lowcore *lc = lowcore_ptr[cpu];
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return !!(lc->cpu_flags & (1UL << flag));
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}
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#define arch_needs_cpu() test_cpu_flag(CIF_NOHZ_DELAY)
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/*
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* Default implementation of macro that returns current
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* instruction pointer ("program counter").
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*/
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#define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; })
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static inline void get_cpu_id(struct cpuid *ptr)
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{
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asm volatile("stidp %0" : "=Q" (*ptr));
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}
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void s390_adjust_jiffies(void);
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void s390_update_cpu_mhz(void);
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void cpu_detect_mhz_feature(void);
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extern const struct seq_operations cpuinfo_op;
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extern int sysctl_ieee_emulation_warnings;
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extern void execve_tail(void);
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/*
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* User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit.
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*/
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#define TASK_SIZE_OF(tsk) ((tsk)->mm ? \
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(tsk)->mm->context.asce_limit : TASK_MAX_SIZE)
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#define TASK_UNMAPPED_BASE (test_thread_flag(TIF_31BIT) ? \
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(1UL << 30) : (1UL << 41))
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#define TASK_SIZE TASK_SIZE_OF(current)
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#define TASK_MAX_SIZE (1UL << 53)
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#define STACK_TOP (1UL << (test_thread_flag(TIF_31BIT) ? 31:42))
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#define STACK_TOP_MAX (1UL << 42)
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#define HAVE_ARCH_PICK_MMAP_LAYOUT
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typedef struct {
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__u32 ar4;
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} mm_segment_t;
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/*
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* Thread structure
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*/
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struct thread_struct {
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unsigned int acrs[NUM_ACRS];
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unsigned long ksp; /* kernel stack pointer */
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unsigned long user_timer; /* task cputime in user space */
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unsigned long guest_timer; /* task cputime in kvm guest */
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unsigned long system_timer; /* task cputime in kernel space */
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unsigned long hardirq_timer; /* task cputime in hardirq context */
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unsigned long softirq_timer; /* task cputime in softirq context */
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unsigned long sys_call_table; /* system call table address */
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mm_segment_t mm_segment;
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unsigned long gmap_addr; /* address of last gmap fault. */
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unsigned int gmap_write_flag; /* gmap fault write indication */
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unsigned int gmap_int_code; /* int code of last gmap fault */
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unsigned int gmap_pfault; /* signal of a pending guest pfault */
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/* Per-thread information related to debugging */
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struct per_regs per_user; /* User specified PER registers */
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struct per_event per_event; /* Cause of the last PER trap */
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unsigned long per_flags; /* Flags to control debug behavior */
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unsigned int system_call; /* system call number in signal */
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unsigned long last_break; /* last breaking-event-address. */
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/* pfault_wait is used to block the process on a pfault event */
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unsigned long pfault_wait;
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struct list_head list;
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/* cpu runtime instrumentation */
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struct runtime_instr_cb *ri_cb;
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struct gs_cb *gs_cb; /* Current guarded storage cb */
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struct gs_cb *gs_bc_cb; /* Broadcast guarded storage cb */
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unsigned char trap_tdb[256]; /* Transaction abort diagnose block */
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/*
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* Warning: 'fpu' is dynamically-sized. It *MUST* be at
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* the end.
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*/
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struct fpu fpu; /* FP and VX register save area */
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};
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/* Flag to disable transactions. */
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#define PER_FLAG_NO_TE 1UL
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/* Flag to enable random transaction aborts. */
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#define PER_FLAG_TE_ABORT_RAND 2UL
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/* Flag to specify random transaction abort mode:
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* - abort each transaction at a random instruction before TEND if set.
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* - abort random transactions at a random instruction if cleared.
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*/
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#define PER_FLAG_TE_ABORT_RAND_TEND 4UL
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typedef struct thread_struct thread_struct;
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/*
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* Stack layout of a C stack frame.
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*/
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#ifndef __PACK_STACK
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struct stack_frame {
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unsigned long back_chain;
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unsigned long empty1[5];
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unsigned long gprs[10];
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unsigned int empty2[8];
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};
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#else
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struct stack_frame {
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unsigned long empty1[5];
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unsigned int empty2[8];
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unsigned long gprs[10];
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unsigned long back_chain;
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};
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#endif
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#define ARCH_MIN_TASKALIGN 8
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#define INIT_THREAD { \
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.ksp = sizeof(init_stack) + (unsigned long) &init_stack, \
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.fpu.regs = (void *) init_task.thread.fpu.fprs, \
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}
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/*
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* Do necessary setup to start up a new thread.
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*/
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#define start_thread(regs, new_psw, new_stackp) do { \
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regs->psw.mask = PSW_USER_BITS | PSW_MASK_EA | PSW_MASK_BA; \
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regs->psw.addr = new_psw; \
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regs->gprs[15] = new_stackp; \
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execve_tail(); \
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} while (0)
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#define start_thread31(regs, new_psw, new_stackp) do { \
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regs->psw.mask = PSW_USER_BITS | PSW_MASK_BA; \
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regs->psw.addr = new_psw; \
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regs->gprs[15] = new_stackp; \
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crst_table_downgrade(current->mm); \
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execve_tail(); \
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} while (0)
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/* Forward declaration, a strange C thing */
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struct task_struct;
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struct mm_struct;
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struct seq_file;
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struct pt_regs;
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typedef int (*dump_trace_func_t)(void *data, unsigned long address, int reliable);
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void dump_trace(dump_trace_func_t func, void *data,
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struct task_struct *task, unsigned long sp);
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void show_registers(struct pt_regs *regs);
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void show_cacheinfo(struct seq_file *m);
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/* Free all resources held by a thread. */
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extern void release_thread(struct task_struct *);
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/* Free guarded storage control block for current */
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void exit_thread_gs(void);
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/*
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* Return saved PC of a blocked thread.
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*/
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extern unsigned long thread_saved_pc(struct task_struct *t);
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unsigned long get_wchan(struct task_struct *p);
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#define task_pt_regs(tsk) ((struct pt_regs *) \
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(task_stack_page(tsk) + THREAD_SIZE) - 1)
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#define KSTK_EIP(tsk) (task_pt_regs(tsk)->psw.addr)
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#define KSTK_ESP(tsk) (task_pt_regs(tsk)->gprs[15])
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/* Has task runtime instrumentation enabled ? */
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#define is_ri_task(tsk) (!!(tsk)->thread.ri_cb)
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static inline unsigned long current_stack_pointer(void)
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{
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unsigned long sp;
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asm volatile("la %0,0(15)" : "=a" (sp));
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return sp;
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}
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static inline unsigned short stap(void)
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{
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unsigned short cpu_address;
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asm volatile("stap %0" : "=m" (cpu_address));
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return cpu_address;
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}
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/*
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* Give up the time slice of the virtual PU.
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*/
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#define cpu_relax_yield cpu_relax_yield
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void cpu_relax_yield(void);
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#define cpu_relax() barrier()
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#define ECAG_CACHE_ATTRIBUTE 0
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#define ECAG_CPU_ATTRIBUTE 1
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static inline unsigned long __ecag(unsigned int asi, unsigned char parm)
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{
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unsigned long val;
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asm volatile(".insn rsy,0xeb000000004c,%0,0,0(%1)" /* ecag */
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: "=d" (val) : "a" (asi << 8 | parm));
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return val;
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}
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static inline void psw_set_key(unsigned int key)
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{
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asm volatile("spka 0(%0)" : : "d" (key));
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}
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/*
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* Set PSW to specified value.
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*/
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static inline void __load_psw(psw_t psw)
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{
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asm volatile("lpswe %0" : : "Q" (psw) : "cc");
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}
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/*
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* Set PSW mask to specified value, while leaving the
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* PSW addr pointing to the next instruction.
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*/
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static inline void __load_psw_mask(unsigned long mask)
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{
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unsigned long addr;
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psw_t psw;
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psw.mask = mask;
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asm volatile(
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" larl %0,1f\n"
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" stg %0,%O1+8(%R1)\n"
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" lpswe %1\n"
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"1:"
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: "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc");
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}
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/*
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* Extract current PSW mask
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*/
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static inline unsigned long __extract_psw(void)
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{
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unsigned int reg1, reg2;
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asm volatile("epsw %0,%1" : "=d" (reg1), "=a" (reg2));
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return (((unsigned long) reg1) << 32) | ((unsigned long) reg2);
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}
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static inline void local_mcck_enable(void)
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{
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__load_psw_mask(__extract_psw() | PSW_MASK_MCHECK);
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}
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static inline void local_mcck_disable(void)
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{
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__load_psw_mask(__extract_psw() & ~PSW_MASK_MCHECK);
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}
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/*
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* Rewind PSW instruction address by specified number of bytes.
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*/
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static inline unsigned long __rewind_psw(psw_t psw, unsigned long ilc)
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{
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unsigned long mask;
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mask = (psw.mask & PSW_MASK_EA) ? -1UL :
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(psw.mask & PSW_MASK_BA) ? (1UL << 31) - 1 :
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(1UL << 24) - 1;
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return (psw.addr - ilc) & mask;
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}
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/*
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* Function to stop a processor until the next interrupt occurs
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*/
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void enabled_wait(void);
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/*
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* Function to drop a processor into disabled wait state
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*/
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static inline void __noreturn disabled_wait(unsigned long code)
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{
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psw_t psw;
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psw.mask = PSW_MASK_BASE | PSW_MASK_WAIT | PSW_MASK_BA | PSW_MASK_EA;
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psw.addr = code;
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__load_psw(psw);
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while (1);
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}
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/*
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* Basic Machine Check/Program Check Handler.
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*/
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extern void s390_base_mcck_handler(void);
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extern void s390_base_pgm_handler(void);
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extern void s390_base_ext_handler(void);
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extern void (*s390_base_mcck_handler_fn)(void);
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extern void (*s390_base_pgm_handler_fn)(void);
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extern void (*s390_base_ext_handler_fn)(void);
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#define ARCH_LOW_ADDRESS_LIMIT 0x7fffffffUL
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extern int memcpy_real(void *, void *, size_t);
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extern void memcpy_absolute(void *, void *, size_t);
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#define mem_assign_absolute(dest, val) do { \
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__typeof__(dest) __tmp = (val); \
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\
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BUILD_BUG_ON(sizeof(__tmp) != sizeof(val)); \
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memcpy_absolute(&(dest), &__tmp, sizeof(__tmp)); \
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} while (0)
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#endif /* __ASSEMBLY__ */
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#endif /* __ASM_S390_PROCESSOR_H */
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