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linux/arch/riscv/boot
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Paul Walmsley c35f1b87fc riscv: dts: add initial board data for the SiFive HiFive Unleashed 
Add initial board data for the SiFive HiFive Unleashed A00.

Currently the data populated in this DT file describes the board
DRAM configuration and the external clock sources that supply the
PRCI.

Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Loys Ollivier <lollivier@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Albert Ou <aou@eecs.berkeley.edu>
Cc: Antony Pavlov <antonynpavlov@gmail.com>
Cc: devicetree@vger.kernel.org
Cc: linux-riscv@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
2019-06-17 02:04:10 -07:00
..
dts riscv: dts: add initial board data for the SiFive HiFive Unleashed 2019-06-17 02:04:10 -07:00
.gitignore RISC-V: Build flat and compressed kernel images 2018-11-20 05:19:09 -08:00
install.sh RISC-V: Build flat and compressed kernel images 2018-11-20 05:19:09 -08:00
Makefile RISC-V: Build flat and compressed kernel images 2018-11-20 05:19:09 -08:00