forked from Minki/linux
ac1bdbf22b
The host1x hardware found on Tegra194 is mostly backwards compatible with the version found on Tegra186, with the notable exceptions of the increased number of syncpoints and mlocks. In addition, some rarely used features such as syncpoint wait bases were dropped and some registers had to move around to accomodate the increased number of syncpoints. Signed-off-by: Thierry Reding <treding@nvidia.com>
33 lines
1.4 KiB
C
33 lines
1.4 KiB
C
/*
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* Copyright (c) 2018 NVIDIA Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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#define HOST1X_HV_SYNCPT_PROT_EN 0x1ac4
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#define HOST1X_HV_SYNCPT_PROT_EN_CH_EN BIT(1)
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#define HOST1X_HV_CH_KERNEL_FILTER_GBUFFER(x) (0x2020 + (x * 4))
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#define HOST1X_HV_CMDFIFO_PEEK_CTRL 0x233c
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#define HOST1X_HV_CMDFIFO_PEEK_CTRL_ADDR(x) (x)
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#define HOST1X_HV_CMDFIFO_PEEK_CTRL_CHANNEL(x) ((x) << 16)
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#define HOST1X_HV_CMDFIFO_PEEK_CTRL_ENABLE BIT(31)
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#define HOST1X_HV_CMDFIFO_PEEK_READ 0x2340
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#define HOST1X_HV_CMDFIFO_PEEK_PTRS 0x2344
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#define HOST1X_HV_CMDFIFO_PEEK_PTRS_WR_PTR_V(x) (((x) >> 16) & 0xfff)
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#define HOST1X_HV_CMDFIFO_PEEK_PTRS_RD_PTR_V(x) ((x) & 0xfff)
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#define HOST1X_HV_CMDFIFO_SETUP(x) (0x2588 + (x * 4))
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#define HOST1X_HV_CMDFIFO_SETUP_LIMIT_V(x) (((x) >> 16) & 0xfff)
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#define HOST1X_HV_CMDFIFO_SETUP_BASE_V(x) ((x) & 0xfff)
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#define HOST1X_HV_ICG_EN_OVERRIDE 0x2aa8
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