forked from Minki/linux
01b461bbe7
That register is needed to program very first in order to operate correctly. [crope@iki.fi: returned sequence back, removed sleep, moved reg write earlier to prevent populating tuner ops in case of failure] Cc: <stable@vger.kernel.org> # v3.15+ Signed-off-by: Bimow Chen <Bimow.Chen@ite.com.tw> Signed-off-by: Antti Palosaari <crope@iki.fi> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
454 lines
10 KiB
C
454 lines
10 KiB
C
/*
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* ITE Tech IT9137 silicon tuner driver
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*
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* Copyright (C) 2011 Malcolm Priestley (tvboxspy@gmail.com)
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* IT9137 Copyright (C) ITE Tech Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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*
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.=
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*/
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#include "tuner_it913x_priv.h"
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struct it913x_state {
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struct i2c_adapter *i2c_adap;
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u8 i2c_addr;
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u8 chip_ver;
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u8 tuner_type;
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u8 firmware_ver;
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u16 tun_xtal;
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u8 tun_fdiv;
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u8 tun_clk_mode;
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u32 tun_fn_min;
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};
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/* read multiple registers */
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static int it913x_rd_regs(struct it913x_state *state,
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u32 reg, u8 *data, u8 count)
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{
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int ret;
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u8 b[3];
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struct i2c_msg msg[2] = {
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{ .addr = state->i2c_addr, .flags = 0,
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.buf = b, .len = sizeof(b) },
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{ .addr = state->i2c_addr, .flags = I2C_M_RD,
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.buf = data, .len = count }
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};
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b[0] = (u8)(reg >> 16) & 0xff;
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b[1] = (u8)(reg >> 8) & 0xff;
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b[2] = (u8) reg & 0xff;
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b[0] |= 0x80; /* All reads from demodulator */
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ret = i2c_transfer(state->i2c_adap, msg, 2);
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return ret;
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}
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/* read single register */
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static int it913x_rd_reg(struct it913x_state *state, u32 reg)
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{
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int ret;
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u8 b[1];
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ret = it913x_rd_regs(state, reg, &b[0], sizeof(b));
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return (ret < 0) ? -ENODEV : b[0];
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}
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/* write multiple registers */
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static int it913x_wr_regs(struct it913x_state *state,
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u8 pro, u32 reg, u8 buf[], u8 count)
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{
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u8 b[256];
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struct i2c_msg msg[1] = {
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{ .addr = state->i2c_addr, .flags = 0,
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.buf = b, .len = 3 + count }
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};
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int ret;
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b[0] = (u8)(reg >> 16) & 0xff;
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b[1] = (u8)(reg >> 8) & 0xff;
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b[2] = (u8) reg & 0xff;
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memcpy(&b[3], buf, count);
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if (pro == PRO_DMOD)
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b[0] |= 0x80;
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ret = i2c_transfer(state->i2c_adap, msg, 1);
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if (ret < 0)
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return -EIO;
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return 0;
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}
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/* write single register */
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static int it913x_wr_reg(struct it913x_state *state,
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u8 pro, u32 reg, u32 data)
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{
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int ret;
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u8 b[4];
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u8 s;
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b[0] = data >> 24;
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b[1] = (data >> 16) & 0xff;
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b[2] = (data >> 8) & 0xff;
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b[3] = data & 0xff;
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/* expand write as needed */
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if (data < 0x100)
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s = 3;
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else if (data < 0x1000)
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s = 2;
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else if (data < 0x100000)
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s = 1;
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else
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s = 0;
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ret = it913x_wr_regs(state, pro, reg, &b[s], sizeof(b) - s);
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return ret;
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}
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static int it913x_script_loader(struct it913x_state *state,
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struct it913xset *loadscript)
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{
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int ret, i;
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if (loadscript == NULL)
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return -EINVAL;
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for (i = 0; i < 1000; ++i) {
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if (loadscript[i].pro == 0xff)
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break;
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ret = it913x_wr_regs(state, loadscript[i].pro,
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loadscript[i].address,
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loadscript[i].reg, loadscript[i].count);
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if (ret < 0)
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return -ENODEV;
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}
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return 0;
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}
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static int it913x_init(struct dvb_frontend *fe)
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{
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struct it913x_state *state = fe->tuner_priv;
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int ret, i, reg;
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u8 val, nv_val;
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u8 nv[] = {48, 32, 24, 16, 12, 8, 6, 4, 2};
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u8 b[2];
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reg = it913x_rd_reg(state, 0xec86);
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switch (reg) {
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case 0:
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state->tun_clk_mode = reg;
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state->tun_xtal = 2000;
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state->tun_fdiv = 3;
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val = 16;
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break;
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case -ENODEV:
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return -ENODEV;
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case 1:
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default:
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state->tun_clk_mode = reg;
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state->tun_xtal = 640;
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state->tun_fdiv = 1;
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val = 6;
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break;
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}
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reg = it913x_rd_reg(state, 0xed03);
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if (reg < 0)
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return -ENODEV;
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else if (reg < ARRAY_SIZE(nv))
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nv_val = nv[reg];
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else
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nv_val = 2;
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for (i = 0; i < 50; i++) {
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ret = it913x_rd_regs(state, 0xed23, &b[0], sizeof(b));
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reg = (b[1] << 8) + b[0];
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if (reg > 0)
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break;
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if (ret < 0)
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return -ENODEV;
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udelay(2000);
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}
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state->tun_fn_min = state->tun_xtal * reg;
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state->tun_fn_min /= (state->tun_fdiv * nv_val);
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dev_dbg(&state->i2c_adap->dev, "%s: Tuner fn_min %d\n", __func__,
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state->tun_fn_min);
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if (state->chip_ver > 1)
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msleep(50);
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else {
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for (i = 0; i < 50; i++) {
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reg = it913x_rd_reg(state, 0xec82);
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if (reg > 0)
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break;
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if (reg < 0)
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return -ENODEV;
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udelay(2000);
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}
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}
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/* Power Up Tuner - common all versions */
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ret = it913x_wr_reg(state, PRO_DMOD, 0xec40, 0x1);
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ret |= it913x_wr_reg(state, PRO_DMOD, 0xfba8, 0x0);
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ret |= it913x_wr_reg(state, PRO_DMOD, 0xec57, 0x0);
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ret |= it913x_wr_reg(state, PRO_DMOD, 0xec58, 0x0);
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return it913x_wr_reg(state, PRO_DMOD, 0xed81, val);
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}
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static int it9137_set_params(struct dvb_frontend *fe)
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{
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struct it913x_state *state = fe->tuner_priv;
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struct it913xset *set_tuner = set_it9137_template;
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struct dtv_frontend_properties *p = &fe->dtv_property_cache;
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u32 bandwidth = p->bandwidth_hz;
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u32 frequency_m = p->frequency;
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int ret, reg;
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u32 frequency = frequency_m / 1000;
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u32 freq, temp_f, tmp;
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u16 iqik_m_cal;
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u16 n_div;
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u8 n;
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u8 l_band;
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u8 lna_band;
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u8 bw;
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if (state->firmware_ver == 1)
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set_tuner = set_it9135_template;
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else
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set_tuner = set_it9137_template;
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dev_dbg(&state->i2c_adap->dev, "%s: Tuner Frequency %d Bandwidth %d\n",
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__func__, frequency, bandwidth);
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if (frequency >= 51000 && frequency <= 440000) {
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l_band = 0;
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lna_band = 0;
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} else if (frequency > 440000 && frequency <= 484000) {
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l_band = 1;
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lna_band = 1;
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} else if (frequency > 484000 && frequency <= 533000) {
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l_band = 1;
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lna_band = 2;
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} else if (frequency > 533000 && frequency <= 587000) {
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l_band = 1;
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lna_band = 3;
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} else if (frequency > 587000 && frequency <= 645000) {
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l_band = 1;
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lna_band = 4;
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} else if (frequency > 645000 && frequency <= 710000) {
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l_band = 1;
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lna_band = 5;
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} else if (frequency > 710000 && frequency <= 782000) {
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l_band = 1;
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lna_band = 6;
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} else if (frequency > 782000 && frequency <= 860000) {
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l_band = 1;
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lna_band = 7;
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} else if (frequency > 1450000 && frequency <= 1492000) {
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l_band = 1;
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lna_band = 0;
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} else if (frequency > 1660000 && frequency <= 1685000) {
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l_band = 1;
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lna_band = 1;
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} else
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return -EINVAL;
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set_tuner[0].reg[0] = lna_band;
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switch (bandwidth) {
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case 5000000:
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bw = 0;
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break;
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case 6000000:
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bw = 2;
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break;
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case 7000000:
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bw = 4;
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break;
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default:
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case 8000000:
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bw = 6;
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break;
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}
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set_tuner[1].reg[0] = bw;
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set_tuner[2].reg[0] = 0xa0 | (l_band << 3);
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if (frequency > 53000 && frequency <= 74000) {
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n_div = 48;
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n = 0;
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} else if (frequency > 74000 && frequency <= 111000) {
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n_div = 32;
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n = 1;
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} else if (frequency > 111000 && frequency <= 148000) {
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n_div = 24;
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n = 2;
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} else if (frequency > 148000 && frequency <= 222000) {
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n_div = 16;
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n = 3;
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} else if (frequency > 222000 && frequency <= 296000) {
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n_div = 12;
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n = 4;
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} else if (frequency > 296000 && frequency <= 445000) {
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n_div = 8;
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n = 5;
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} else if (frequency > 445000 && frequency <= state->tun_fn_min) {
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n_div = 6;
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n = 6;
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} else if (frequency > state->tun_fn_min && frequency <= 950000) {
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n_div = 4;
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n = 7;
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} else if (frequency > 1450000 && frequency <= 1680000) {
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n_div = 2;
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n = 0;
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} else
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return -EINVAL;
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reg = it913x_rd_reg(state, 0xed81);
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iqik_m_cal = (u16)reg * n_div;
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if (reg < 0x20) {
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if (state->tun_clk_mode == 0)
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iqik_m_cal = (iqik_m_cal * 9) >> 5;
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else
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iqik_m_cal >>= 1;
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} else {
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iqik_m_cal = 0x40 - iqik_m_cal;
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if (state->tun_clk_mode == 0)
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iqik_m_cal = ~((iqik_m_cal * 9) >> 5);
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else
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iqik_m_cal = ~(iqik_m_cal >> 1);
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}
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temp_f = frequency * (u32)n_div * (u32)state->tun_fdiv;
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freq = temp_f / state->tun_xtal;
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tmp = freq * state->tun_xtal;
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if ((temp_f - tmp) >= (state->tun_xtal >> 1))
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freq++;
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freq += (u32) n << 13;
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/* Frequency OMEGA_IQIK_M_CAL_MID*/
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temp_f = freq + (u32)iqik_m_cal;
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set_tuner[3].reg[0] = temp_f & 0xff;
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set_tuner[4].reg[0] = (temp_f >> 8) & 0xff;
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dev_dbg(&state->i2c_adap->dev, "%s: High Frequency = %04x\n",
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__func__, temp_f);
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/* Lower frequency */
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set_tuner[5].reg[0] = freq & 0xff;
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set_tuner[6].reg[0] = (freq >> 8) & 0xff;
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dev_dbg(&state->i2c_adap->dev, "%s: low Frequency = %04x\n",
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__func__, freq);
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ret = it913x_script_loader(state, set_tuner);
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return (ret < 0) ? -ENODEV : 0;
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}
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/* Power sequence */
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/* Power Up Tuner on -> Frontend suspend off -> Tuner clk on */
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/* Power Down Frontend suspend on -> Tuner clk off -> Tuner off */
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static int it913x_sleep(struct dvb_frontend *fe)
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{
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struct it913x_state *state = fe->tuner_priv;
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return it913x_script_loader(state, it9137_tuner_off);
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}
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static int it913x_release(struct dvb_frontend *fe)
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{
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kfree(fe->tuner_priv);
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return 0;
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}
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static const struct dvb_tuner_ops it913x_tuner_ops = {
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.info = {
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.name = "ITE Tech IT913X",
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.frequency_min = 174000000,
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.frequency_max = 862000000,
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},
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.release = it913x_release,
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.init = it913x_init,
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.sleep = it913x_sleep,
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.set_params = it9137_set_params,
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};
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struct dvb_frontend *it913x_attach(struct dvb_frontend *fe,
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struct i2c_adapter *i2c_adap, u8 i2c_addr, u8 config)
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{
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struct it913x_state *state = NULL;
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int ret;
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/* allocate memory for the internal state */
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state = kzalloc(sizeof(struct it913x_state), GFP_KERNEL);
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if (state == NULL)
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return NULL;
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state->i2c_adap = i2c_adap;
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state->i2c_addr = i2c_addr;
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switch (config) {
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case AF9033_TUNER_IT9135_38:
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case AF9033_TUNER_IT9135_51:
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case AF9033_TUNER_IT9135_52:
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state->chip_ver = 0x01;
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break;
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case AF9033_TUNER_IT9135_60:
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case AF9033_TUNER_IT9135_61:
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case AF9033_TUNER_IT9135_62:
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state->chip_ver = 0x02;
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break;
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default:
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dev_dbg(&i2c_adap->dev,
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"%s: invalid config=%02x\n", __func__, config);
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goto error;
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}
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state->tuner_type = config;
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state->firmware_ver = 1;
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/* tuner RF initial */
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ret = it913x_wr_reg(state, PRO_DMOD, 0xec4c, 0x68);
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if (ret < 0)
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goto error;
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fe->tuner_priv = state;
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memcpy(&fe->ops.tuner_ops, &it913x_tuner_ops,
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sizeof(struct dvb_tuner_ops));
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dev_info(&i2c_adap->dev,
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"%s: ITE Tech IT913X successfully attached\n",
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KBUILD_MODNAME);
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dev_dbg(&i2c_adap->dev, "%s: config=%02x chip_ver=%02x\n",
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__func__, config, state->chip_ver);
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return fe;
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error:
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kfree(state);
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return NULL;
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}
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EXPORT_SYMBOL(it913x_attach);
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MODULE_DESCRIPTION("ITE Tech IT913X silicon tuner driver");
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MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
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MODULE_LICENSE("GPL");
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