forked from Minki/linux
6aa7de0591
Please do not apply this to mainline directly, instead please re-run the coccinelle script shown below and apply its output. For several reasons, it is desirable to use {READ,WRITE}_ONCE() in preference to ACCESS_ONCE(), and new code is expected to use one of the former. So far, there's been no reason to change most existing uses of ACCESS_ONCE(), as these aren't harmful, and changing them results in churn. However, for some features, the read/write distinction is critical to correct operation. To distinguish these cases, separate read/write accessors must be used. This patch migrates (most) remaining ACCESS_ONCE() instances to {READ,WRITE}_ONCE(), using the following coccinelle script: ---- // Convert trivial ACCESS_ONCE() uses to equivalent READ_ONCE() and // WRITE_ONCE() // $ make coccicheck COCCI=/home/mark/once.cocci SPFLAGS="--include-headers" MODE=patch virtual patch @ depends on patch @ expression E1, E2; @@ - ACCESS_ONCE(E1) = E2 + WRITE_ONCE(E1, E2) @ depends on patch @ expression E; @@ - ACCESS_ONCE(E) + READ_ONCE(E) ---- Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: davem@davemloft.net Cc: linux-arch@vger.kernel.org Cc: mpe@ellerman.id.au Cc: shuah@kernel.org Cc: snitzer@redhat.com Cc: thor.thayer@linux.intel.com Cc: tj@kernel.org Cc: viro@zeniv.linux.org.uk Cc: will.deacon@arm.com Link: http://lkml.kernel.org/r/1508792849-3115-19-git-send-email-paulmck@linux.vnet.ibm.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
582 lines
15 KiB
C
582 lines
15 KiB
C
/*
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* CAAM/SEC 4.x transport/backend driver
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* JobR backend functionality
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*
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* Copyright 2008-2012 Freescale Semiconductor, Inc.
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*/
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#include <linux/of_irq.h>
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#include <linux/of_address.h>
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#include "compat.h"
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#include "ctrl.h"
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#include "regs.h"
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#include "jr.h"
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#include "desc.h"
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#include "intern.h"
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struct jr_driver_data {
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/* List of Physical JobR's with the Driver */
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struct list_head jr_list;
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spinlock_t jr_alloc_lock; /* jr_list lock */
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} ____cacheline_aligned;
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static struct jr_driver_data driver_data;
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static int caam_reset_hw_jr(struct device *dev)
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{
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struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
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unsigned int timeout = 100000;
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/*
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* mask interrupts since we are going to poll
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* for reset completion status
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*/
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clrsetbits_32(&jrp->rregs->rconfig_lo, 0, JRCFG_IMSK);
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/* initiate flush (required prior to reset) */
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wr_reg32(&jrp->rregs->jrcommand, JRCR_RESET);
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while (((rd_reg32(&jrp->rregs->jrintstatus) & JRINT_ERR_HALT_MASK) ==
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JRINT_ERR_HALT_INPROGRESS) && --timeout)
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cpu_relax();
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if ((rd_reg32(&jrp->rregs->jrintstatus) & JRINT_ERR_HALT_MASK) !=
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JRINT_ERR_HALT_COMPLETE || timeout == 0) {
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dev_err(dev, "failed to flush job ring %d\n", jrp->ridx);
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return -EIO;
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}
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/* initiate reset */
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timeout = 100000;
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wr_reg32(&jrp->rregs->jrcommand, JRCR_RESET);
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while ((rd_reg32(&jrp->rregs->jrcommand) & JRCR_RESET) && --timeout)
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cpu_relax();
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if (timeout == 0) {
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dev_err(dev, "failed to reset job ring %d\n", jrp->ridx);
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return -EIO;
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}
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/* unmask interrupts */
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clrsetbits_32(&jrp->rregs->rconfig_lo, JRCFG_IMSK, 0);
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return 0;
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}
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/*
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* Shutdown JobR independent of platform property code
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*/
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static int caam_jr_shutdown(struct device *dev)
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{
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struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
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dma_addr_t inpbusaddr, outbusaddr;
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int ret;
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ret = caam_reset_hw_jr(dev);
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tasklet_kill(&jrp->irqtask);
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/* Release interrupt */
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free_irq(jrp->irq, dev);
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/* Free rings */
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inpbusaddr = rd_reg64(&jrp->rregs->inpring_base);
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outbusaddr = rd_reg64(&jrp->rregs->outring_base);
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dma_free_coherent(dev, sizeof(dma_addr_t) * JOBR_DEPTH,
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jrp->inpring, inpbusaddr);
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dma_free_coherent(dev, sizeof(struct jr_outentry) * JOBR_DEPTH,
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jrp->outring, outbusaddr);
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kfree(jrp->entinfo);
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return ret;
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}
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static int caam_jr_remove(struct platform_device *pdev)
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{
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int ret;
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struct device *jrdev;
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struct caam_drv_private_jr *jrpriv;
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jrdev = &pdev->dev;
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jrpriv = dev_get_drvdata(jrdev);
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/*
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* Return EBUSY if job ring already allocated.
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*/
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if (atomic_read(&jrpriv->tfm_count)) {
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dev_err(jrdev, "Device is busy\n");
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return -EBUSY;
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}
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/* Remove the node from Physical JobR list maintained by driver */
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spin_lock(&driver_data.jr_alloc_lock);
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list_del(&jrpriv->list_node);
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spin_unlock(&driver_data.jr_alloc_lock);
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/* Release ring */
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ret = caam_jr_shutdown(jrdev);
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if (ret)
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dev_err(jrdev, "Failed to shut down job ring\n");
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irq_dispose_mapping(jrpriv->irq);
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return ret;
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}
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/* Main per-ring interrupt handler */
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static irqreturn_t caam_jr_interrupt(int irq, void *st_dev)
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{
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struct device *dev = st_dev;
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struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
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u32 irqstate;
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/*
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* Check the output ring for ready responses, kick
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* tasklet if jobs done.
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*/
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irqstate = rd_reg32(&jrp->rregs->jrintstatus);
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if (!irqstate)
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return IRQ_NONE;
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/*
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* If JobR error, we got more development work to do
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* Flag a bug now, but we really need to shut down and
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* restart the queue (and fix code).
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*/
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if (irqstate & JRINT_JR_ERROR) {
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dev_err(dev, "job ring error: irqstate: %08x\n", irqstate);
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BUG();
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}
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/* mask valid interrupts */
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clrsetbits_32(&jrp->rregs->rconfig_lo, 0, JRCFG_IMSK);
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/* Have valid interrupt at this point, just ACK and trigger */
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wr_reg32(&jrp->rregs->jrintstatus, irqstate);
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preempt_disable();
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tasklet_schedule(&jrp->irqtask);
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preempt_enable();
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return IRQ_HANDLED;
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}
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/* Deferred service handler, run as interrupt-fired tasklet */
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static void caam_jr_dequeue(unsigned long devarg)
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{
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int hw_idx, sw_idx, i, head, tail;
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struct device *dev = (struct device *)devarg;
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struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
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void (*usercall)(struct device *dev, u32 *desc, u32 status, void *arg);
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u32 *userdesc, userstatus;
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void *userarg;
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while (rd_reg32(&jrp->rregs->outring_used)) {
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head = READ_ONCE(jrp->head);
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spin_lock(&jrp->outlock);
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sw_idx = tail = jrp->tail;
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hw_idx = jrp->out_ring_read_index;
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for (i = 0; CIRC_CNT(head, tail + i, JOBR_DEPTH) >= 1; i++) {
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sw_idx = (tail + i) & (JOBR_DEPTH - 1);
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if (jrp->outring[hw_idx].desc ==
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caam_dma_to_cpu(jrp->entinfo[sw_idx].desc_addr_dma))
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break; /* found */
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}
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/* we should never fail to find a matching descriptor */
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BUG_ON(CIRC_CNT(head, tail + i, JOBR_DEPTH) <= 0);
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/* Unmap just-run descriptor so we can post-process */
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dma_unmap_single(dev, jrp->outring[hw_idx].desc,
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jrp->entinfo[sw_idx].desc_size,
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DMA_TO_DEVICE);
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/* mark completed, avoid matching on a recycled desc addr */
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jrp->entinfo[sw_idx].desc_addr_dma = 0;
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/* Stash callback params for use outside of lock */
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usercall = jrp->entinfo[sw_idx].callbk;
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userarg = jrp->entinfo[sw_idx].cbkarg;
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userdesc = jrp->entinfo[sw_idx].desc_addr_virt;
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userstatus = caam32_to_cpu(jrp->outring[hw_idx].jrstatus);
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/*
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* Make sure all information from the job has been obtained
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* before telling CAAM that the job has been removed from the
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* output ring.
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*/
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mb();
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/* set done */
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wr_reg32(&jrp->rregs->outring_rmvd, 1);
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jrp->out_ring_read_index = (jrp->out_ring_read_index + 1) &
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(JOBR_DEPTH - 1);
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/*
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* if this job completed out-of-order, do not increment
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* the tail. Otherwise, increment tail by 1 plus the
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* number of subsequent jobs already completed out-of-order
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*/
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if (sw_idx == tail) {
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do {
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tail = (tail + 1) & (JOBR_DEPTH - 1);
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} while (CIRC_CNT(head, tail, JOBR_DEPTH) >= 1 &&
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jrp->entinfo[tail].desc_addr_dma == 0);
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jrp->tail = tail;
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}
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spin_unlock(&jrp->outlock);
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/* Finally, execute user's callback */
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usercall(dev, userdesc, userstatus, userarg);
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}
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/* reenable / unmask IRQs */
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clrsetbits_32(&jrp->rregs->rconfig_lo, JRCFG_IMSK, 0);
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}
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/**
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* caam_jr_alloc() - Alloc a job ring for someone to use as needed.
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*
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* returns : pointer to the newly allocated physical
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* JobR dev can be written to if successful.
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**/
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struct device *caam_jr_alloc(void)
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{
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struct caam_drv_private_jr *jrpriv, *min_jrpriv = NULL;
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struct device *dev = ERR_PTR(-ENODEV);
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int min_tfm_cnt = INT_MAX;
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int tfm_cnt;
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spin_lock(&driver_data.jr_alloc_lock);
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if (list_empty(&driver_data.jr_list)) {
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spin_unlock(&driver_data.jr_alloc_lock);
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return ERR_PTR(-ENODEV);
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}
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list_for_each_entry(jrpriv, &driver_data.jr_list, list_node) {
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tfm_cnt = atomic_read(&jrpriv->tfm_count);
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if (tfm_cnt < min_tfm_cnt) {
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min_tfm_cnt = tfm_cnt;
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min_jrpriv = jrpriv;
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}
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if (!min_tfm_cnt)
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break;
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}
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if (min_jrpriv) {
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atomic_inc(&min_jrpriv->tfm_count);
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dev = min_jrpriv->dev;
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}
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spin_unlock(&driver_data.jr_alloc_lock);
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return dev;
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}
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EXPORT_SYMBOL(caam_jr_alloc);
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/**
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* caam_jr_free() - Free the Job Ring
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* @rdev - points to the dev that identifies the Job ring to
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* be released.
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**/
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void caam_jr_free(struct device *rdev)
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{
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struct caam_drv_private_jr *jrpriv = dev_get_drvdata(rdev);
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atomic_dec(&jrpriv->tfm_count);
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}
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EXPORT_SYMBOL(caam_jr_free);
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/**
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* caam_jr_enqueue() - Enqueue a job descriptor head. Returns 0 if OK,
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* -EBUSY if the queue is full, -EIO if it cannot map the caller's
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* descriptor.
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* @dev: device of the job ring to be used. This device should have
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* been assigned prior by caam_jr_register().
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* @desc: points to a job descriptor that execute our request. All
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* descriptors (and all referenced data) must be in a DMAable
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* region, and all data references must be physical addresses
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* accessible to CAAM (i.e. within a PAMU window granted
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* to it).
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* @cbk: pointer to a callback function to be invoked upon completion
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* of this request. This has the form:
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* callback(struct device *dev, u32 *desc, u32 stat, void *arg)
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* where:
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* @dev: contains the job ring device that processed this
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* response.
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* @desc: descriptor that initiated the request, same as
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* "desc" being argued to caam_jr_enqueue().
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* @status: untranslated status received from CAAM. See the
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* reference manual for a detailed description of
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* error meaning, or see the JRSTA definitions in the
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* register header file
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* @areq: optional pointer to an argument passed with the
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* original request
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* @areq: optional pointer to a user argument for use at callback
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* time.
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**/
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int caam_jr_enqueue(struct device *dev, u32 *desc,
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void (*cbk)(struct device *dev, u32 *desc,
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u32 status, void *areq),
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void *areq)
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{
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struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
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struct caam_jrentry_info *head_entry;
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int head, tail, desc_size;
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dma_addr_t desc_dma;
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desc_size = (caam32_to_cpu(*desc) & HDR_JD_LENGTH_MASK) * sizeof(u32);
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desc_dma = dma_map_single(dev, desc, desc_size, DMA_TO_DEVICE);
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if (dma_mapping_error(dev, desc_dma)) {
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dev_err(dev, "caam_jr_enqueue(): can't map jobdesc\n");
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return -EIO;
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}
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spin_lock_bh(&jrp->inplock);
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head = jrp->head;
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tail = READ_ONCE(jrp->tail);
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if (!rd_reg32(&jrp->rregs->inpring_avail) ||
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CIRC_SPACE(head, tail, JOBR_DEPTH) <= 0) {
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spin_unlock_bh(&jrp->inplock);
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dma_unmap_single(dev, desc_dma, desc_size, DMA_TO_DEVICE);
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return -EBUSY;
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}
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head_entry = &jrp->entinfo[head];
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head_entry->desc_addr_virt = desc;
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head_entry->desc_size = desc_size;
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head_entry->callbk = (void *)cbk;
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head_entry->cbkarg = areq;
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head_entry->desc_addr_dma = desc_dma;
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jrp->inpring[jrp->inp_ring_write_index] = cpu_to_caam_dma(desc_dma);
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/*
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* Guarantee that the descriptor's DMA address has been written to
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* the next slot in the ring before the write index is updated, since
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* other cores may update this index independently.
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*/
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smp_wmb();
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jrp->inp_ring_write_index = (jrp->inp_ring_write_index + 1) &
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(JOBR_DEPTH - 1);
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jrp->head = (head + 1) & (JOBR_DEPTH - 1);
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/*
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* Ensure that all job information has been written before
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* notifying CAAM that a new job was added to the input ring.
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*/
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wmb();
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wr_reg32(&jrp->rregs->inpring_jobadd, 1);
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spin_unlock_bh(&jrp->inplock);
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return 0;
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}
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EXPORT_SYMBOL(caam_jr_enqueue);
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/*
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* Init JobR independent of platform property detection
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*/
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static int caam_jr_init(struct device *dev)
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{
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struct caam_drv_private_jr *jrp;
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dma_addr_t inpbusaddr, outbusaddr;
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int i, error;
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jrp = dev_get_drvdata(dev);
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tasklet_init(&jrp->irqtask, caam_jr_dequeue, (unsigned long)dev);
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/* Connect job ring interrupt handler. */
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error = request_irq(jrp->irq, caam_jr_interrupt, IRQF_SHARED,
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dev_name(dev), dev);
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if (error) {
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dev_err(dev, "can't connect JobR %d interrupt (%d)\n",
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jrp->ridx, jrp->irq);
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goto out_kill_deq;
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}
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error = caam_reset_hw_jr(dev);
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if (error)
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goto out_free_irq;
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error = -ENOMEM;
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jrp->inpring = dma_alloc_coherent(dev, sizeof(*jrp->inpring) *
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JOBR_DEPTH, &inpbusaddr, GFP_KERNEL);
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if (!jrp->inpring)
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goto out_free_irq;
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jrp->outring = dma_alloc_coherent(dev, sizeof(*jrp->outring) *
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JOBR_DEPTH, &outbusaddr, GFP_KERNEL);
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if (!jrp->outring)
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goto out_free_inpring;
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jrp->entinfo = kcalloc(JOBR_DEPTH, sizeof(*jrp->entinfo), GFP_KERNEL);
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if (!jrp->entinfo)
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goto out_free_outring;
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for (i = 0; i < JOBR_DEPTH; i++)
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jrp->entinfo[i].desc_addr_dma = !0;
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/* Setup rings */
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jrp->inp_ring_write_index = 0;
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jrp->out_ring_read_index = 0;
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jrp->head = 0;
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jrp->tail = 0;
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wr_reg64(&jrp->rregs->inpring_base, inpbusaddr);
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wr_reg64(&jrp->rregs->outring_base, outbusaddr);
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wr_reg32(&jrp->rregs->inpring_size, JOBR_DEPTH);
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wr_reg32(&jrp->rregs->outring_size, JOBR_DEPTH);
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jrp->ringsize = JOBR_DEPTH;
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spin_lock_init(&jrp->inplock);
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spin_lock_init(&jrp->outlock);
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/* Select interrupt coalescing parameters */
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clrsetbits_32(&jrp->rregs->rconfig_lo, 0, JOBR_INTC |
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(JOBR_INTC_COUNT_THLD << JRCFG_ICDCT_SHIFT) |
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(JOBR_INTC_TIME_THLD << JRCFG_ICTT_SHIFT));
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return 0;
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out_free_outring:
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dma_free_coherent(dev, sizeof(struct jr_outentry) * JOBR_DEPTH,
|
|
jrp->outring, outbusaddr);
|
|
out_free_inpring:
|
|
dma_free_coherent(dev, sizeof(dma_addr_t) * JOBR_DEPTH,
|
|
jrp->inpring, inpbusaddr);
|
|
dev_err(dev, "can't allocate job rings for %d\n", jrp->ridx);
|
|
out_free_irq:
|
|
free_irq(jrp->irq, dev);
|
|
out_kill_deq:
|
|
tasklet_kill(&jrp->irqtask);
|
|
return error;
|
|
}
|
|
|
|
|
|
/*
|
|
* Probe routine for each detected JobR subsystem.
|
|
*/
|
|
static int caam_jr_probe(struct platform_device *pdev)
|
|
{
|
|
struct device *jrdev;
|
|
struct device_node *nprop;
|
|
struct caam_job_ring __iomem *ctrl;
|
|
struct caam_drv_private_jr *jrpriv;
|
|
static int total_jobrs;
|
|
int error;
|
|
|
|
jrdev = &pdev->dev;
|
|
jrpriv = devm_kmalloc(jrdev, sizeof(*jrpriv), GFP_KERNEL);
|
|
if (!jrpriv)
|
|
return -ENOMEM;
|
|
|
|
dev_set_drvdata(jrdev, jrpriv);
|
|
|
|
/* save ring identity relative to detection */
|
|
jrpriv->ridx = total_jobrs++;
|
|
|
|
nprop = pdev->dev.of_node;
|
|
/* Get configuration properties from device tree */
|
|
/* First, get register page */
|
|
ctrl = of_iomap(nprop, 0);
|
|
if (!ctrl) {
|
|
dev_err(jrdev, "of_iomap() failed\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
jrpriv->rregs = (struct caam_job_ring __iomem __force *)ctrl;
|
|
|
|
if (sizeof(dma_addr_t) == sizeof(u64)) {
|
|
if (caam_dpaa2)
|
|
error = dma_set_mask_and_coherent(jrdev,
|
|
DMA_BIT_MASK(49));
|
|
else if (of_device_is_compatible(nprop,
|
|
"fsl,sec-v5.0-job-ring"))
|
|
error = dma_set_mask_and_coherent(jrdev,
|
|
DMA_BIT_MASK(40));
|
|
else
|
|
error = dma_set_mask_and_coherent(jrdev,
|
|
DMA_BIT_MASK(36));
|
|
} else {
|
|
error = dma_set_mask_and_coherent(jrdev, DMA_BIT_MASK(32));
|
|
}
|
|
if (error) {
|
|
dev_err(jrdev, "dma_set_mask_and_coherent failed (%d)\n",
|
|
error);
|
|
iounmap(ctrl);
|
|
return error;
|
|
}
|
|
|
|
/* Identify the interrupt */
|
|
jrpriv->irq = irq_of_parse_and_map(nprop, 0);
|
|
|
|
/* Now do the platform independent part */
|
|
error = caam_jr_init(jrdev); /* now turn on hardware */
|
|
if (error) {
|
|
irq_dispose_mapping(jrpriv->irq);
|
|
iounmap(ctrl);
|
|
return error;
|
|
}
|
|
|
|
jrpriv->dev = jrdev;
|
|
spin_lock(&driver_data.jr_alloc_lock);
|
|
list_add_tail(&jrpriv->list_node, &driver_data.jr_list);
|
|
spin_unlock(&driver_data.jr_alloc_lock);
|
|
|
|
atomic_set(&jrpriv->tfm_count, 0);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id caam_jr_match[] = {
|
|
{
|
|
.compatible = "fsl,sec-v4.0-job-ring",
|
|
},
|
|
{
|
|
.compatible = "fsl,sec4.0-job-ring",
|
|
},
|
|
{},
|
|
};
|
|
MODULE_DEVICE_TABLE(of, caam_jr_match);
|
|
|
|
static struct platform_driver caam_jr_driver = {
|
|
.driver = {
|
|
.name = "caam_jr",
|
|
.of_match_table = caam_jr_match,
|
|
},
|
|
.probe = caam_jr_probe,
|
|
.remove = caam_jr_remove,
|
|
};
|
|
|
|
static int __init jr_driver_init(void)
|
|
{
|
|
spin_lock_init(&driver_data.jr_alloc_lock);
|
|
INIT_LIST_HEAD(&driver_data.jr_list);
|
|
return platform_driver_register(&caam_jr_driver);
|
|
}
|
|
|
|
static void __exit jr_driver_exit(void)
|
|
{
|
|
platform_driver_unregister(&caam_jr_driver);
|
|
}
|
|
|
|
module_init(jr_driver_init);
|
|
module_exit(jr_driver_exit);
|
|
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_DESCRIPTION("FSL CAAM JR request backend");
|
|
MODULE_AUTHOR("Freescale Semiconductor - NMG/STC");
|