forked from Minki/linux
6e8958ec0e
The loop iterating over curr_ctrl in dw_hdmi terminates on mpixelclock == ~0UL, so there needs to be an end of list element here in case a mode with a pixel clock larger than 216 MHz is set. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
285 lines
6.9 KiB
C
285 lines
6.9 KiB
C
/* Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
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*
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* derived from imx-hdmi.c(renamed to bridge/dw_hdmi.c now)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/component.h>
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#include <linux/mfd/syscon.h>
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#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
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#include <drm/bridge/dw_hdmi.h>
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#include <video/imx-ipu-v3.h>
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#include <linux/regmap.h>
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#include <drm/drm_of.h>
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#include <drm/drmP.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_edid.h>
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#include <drm/drm_encoder_slave.h>
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#include "imx-drm.h"
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struct imx_hdmi {
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struct device *dev;
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struct drm_encoder encoder;
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struct regmap *regmap;
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};
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static const struct dw_hdmi_mpll_config imx_mpll_cfg[] = {
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{
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45250000, {
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{ 0x01e0, 0x0000 },
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{ 0x21e1, 0x0000 },
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{ 0x41e2, 0x0000 }
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},
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}, {
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92500000, {
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{ 0x0140, 0x0005 },
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{ 0x2141, 0x0005 },
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{ 0x4142, 0x0005 },
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},
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}, {
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148500000, {
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{ 0x00a0, 0x000a },
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{ 0x20a1, 0x000a },
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{ 0x40a2, 0x000a },
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},
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}, {
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~0UL, {
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{ 0x00a0, 0x000a },
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{ 0x2001, 0x000f },
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{ 0x4002, 0x000f },
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},
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}
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};
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static const struct dw_hdmi_curr_ctrl imx_cur_ctr[] = {
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/* pixelclk bpp8 bpp10 bpp12 */
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{
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54000000, { 0x091c, 0x091c, 0x06dc },
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}, {
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58400000, { 0x091c, 0x06dc, 0x06dc },
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}, {
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72000000, { 0x06dc, 0x06dc, 0x091c },
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}, {
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74250000, { 0x06dc, 0x0b5c, 0x091c },
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}, {
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118800000, { 0x091c, 0x091c, 0x06dc },
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}, {
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216000000, { 0x06dc, 0x0b5c, 0x091c },
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}, {
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~0UL, { 0x0000, 0x0000, 0x0000 },
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},
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};
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static const struct dw_hdmi_sym_term imx_sym_term[] = {
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/*pixelclk symbol term*/
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{ 148500000, 0x800d, 0x0005 },
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{ ~0UL, 0x0000, 0x0000 }
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};
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static int dw_hdmi_imx_parse_dt(struct imx_hdmi *hdmi)
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{
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struct device_node *np = hdmi->dev->of_node;
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hdmi->regmap = syscon_regmap_lookup_by_phandle(np, "gpr");
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if (IS_ERR(hdmi->regmap)) {
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dev_err(hdmi->dev, "Unable to get gpr\n");
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return PTR_ERR(hdmi->regmap);
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}
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return 0;
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}
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static void dw_hdmi_imx_encoder_disable(struct drm_encoder *encoder)
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{
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}
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static bool dw_hdmi_imx_encoder_mode_fixup(struct drm_encoder *encoder,
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const struct drm_display_mode *mode,
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struct drm_display_mode *adj_mode)
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{
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return true;
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}
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static void dw_hdmi_imx_encoder_mode_set(struct drm_encoder *encoder,
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struct drm_display_mode *mode,
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struct drm_display_mode *adj_mode)
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{
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}
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static void dw_hdmi_imx_encoder_commit(struct drm_encoder *encoder)
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{
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struct imx_hdmi *hdmi = container_of(encoder, struct imx_hdmi, encoder);
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int mux = imx_drm_encoder_get_mux_id(hdmi->dev->of_node, encoder);
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regmap_update_bits(hdmi->regmap, IOMUXC_GPR3,
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IMX6Q_GPR3_HDMI_MUX_CTL_MASK,
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mux << IMX6Q_GPR3_HDMI_MUX_CTL_SHIFT);
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}
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static void dw_hdmi_imx_encoder_prepare(struct drm_encoder *encoder)
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{
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imx_drm_panel_format(encoder, V4L2_PIX_FMT_RGB24);
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}
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static struct drm_encoder_helper_funcs dw_hdmi_imx_encoder_helper_funcs = {
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.mode_fixup = dw_hdmi_imx_encoder_mode_fixup,
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.mode_set = dw_hdmi_imx_encoder_mode_set,
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.prepare = dw_hdmi_imx_encoder_prepare,
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.commit = dw_hdmi_imx_encoder_commit,
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.disable = dw_hdmi_imx_encoder_disable,
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};
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static struct drm_encoder_funcs dw_hdmi_imx_encoder_funcs = {
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.destroy = drm_encoder_cleanup,
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};
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static enum drm_mode_status imx6q_hdmi_mode_valid(struct drm_connector *con,
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struct drm_display_mode *mode)
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{
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if (mode->clock < 13500)
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return MODE_CLOCK_LOW;
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if (mode->clock > 266000)
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return MODE_CLOCK_HIGH;
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return MODE_OK;
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}
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static enum drm_mode_status imx6dl_hdmi_mode_valid(struct drm_connector *con,
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struct drm_display_mode *mode)
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{
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if (mode->clock < 13500)
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return MODE_CLOCK_LOW;
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if (mode->clock > 270000)
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return MODE_CLOCK_HIGH;
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return MODE_OK;
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}
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static struct dw_hdmi_plat_data imx6q_hdmi_drv_data = {
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.mpll_cfg = imx_mpll_cfg,
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.cur_ctr = imx_cur_ctr,
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.sym_term = imx_sym_term,
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.dev_type = IMX6Q_HDMI,
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.mode_valid = imx6q_hdmi_mode_valid,
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};
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static struct dw_hdmi_plat_data imx6dl_hdmi_drv_data = {
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.mpll_cfg = imx_mpll_cfg,
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.cur_ctr = imx_cur_ctr,
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.sym_term = imx_sym_term,
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.dev_type = IMX6DL_HDMI,
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.mode_valid = imx6dl_hdmi_mode_valid,
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};
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static const struct of_device_id dw_hdmi_imx_dt_ids[] = {
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{ .compatible = "fsl,imx6q-hdmi",
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.data = &imx6q_hdmi_drv_data
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}, {
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.compatible = "fsl,imx6dl-hdmi",
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.data = &imx6dl_hdmi_drv_data
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},
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{},
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};
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MODULE_DEVICE_TABLE(of, dw_hdmi_imx_dt_ids);
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static int dw_hdmi_imx_bind(struct device *dev, struct device *master,
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void *data)
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{
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struct platform_device *pdev = to_platform_device(dev);
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const struct dw_hdmi_plat_data *plat_data;
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const struct of_device_id *match;
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struct drm_device *drm = data;
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struct drm_encoder *encoder;
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struct imx_hdmi *hdmi;
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struct resource *iores;
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int irq;
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int ret;
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if (!pdev->dev.of_node)
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return -ENODEV;
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hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL);
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if (!hdmi)
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return -ENOMEM;
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match = of_match_node(dw_hdmi_imx_dt_ids, pdev->dev.of_node);
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plat_data = match->data;
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hdmi->dev = &pdev->dev;
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encoder = &hdmi->encoder;
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irq = platform_get_irq(pdev, 0);
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if (irq < 0)
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return irq;
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iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!iores)
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return -ENXIO;
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platform_set_drvdata(pdev, hdmi);
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encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node);
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/*
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* If we failed to find the CRTC(s) which this encoder is
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* supposed to be connected to, it's because the CRTC has
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* not been registered yet. Defer probing, and hope that
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* the required CRTC is added later.
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*/
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if (encoder->possible_crtcs == 0)
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return -EPROBE_DEFER;
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ret = dw_hdmi_imx_parse_dt(hdmi);
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if (ret < 0)
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return ret;
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drm_encoder_helper_add(encoder, &dw_hdmi_imx_encoder_helper_funcs);
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drm_encoder_init(drm, encoder, &dw_hdmi_imx_encoder_funcs,
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DRM_MODE_ENCODER_TMDS);
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return dw_hdmi_bind(dev, master, data, encoder, iores, irq, plat_data);
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}
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static void dw_hdmi_imx_unbind(struct device *dev, struct device *master,
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void *data)
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{
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return dw_hdmi_unbind(dev, master, data);
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}
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static const struct component_ops dw_hdmi_imx_ops = {
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.bind = dw_hdmi_imx_bind,
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.unbind = dw_hdmi_imx_unbind,
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};
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static int dw_hdmi_imx_probe(struct platform_device *pdev)
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{
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return component_add(&pdev->dev, &dw_hdmi_imx_ops);
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}
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static int dw_hdmi_imx_remove(struct platform_device *pdev)
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{
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component_del(&pdev->dev, &dw_hdmi_imx_ops);
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return 0;
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}
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static struct platform_driver dw_hdmi_imx_platform_driver = {
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.probe = dw_hdmi_imx_probe,
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.remove = dw_hdmi_imx_remove,
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.driver = {
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.name = "dwhdmi-imx",
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.of_match_table = dw_hdmi_imx_dt_ids,
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},
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};
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module_platform_driver(dw_hdmi_imx_platform_driver);
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MODULE_AUTHOR("Andy Yan <andy.yan@rock-chips.com>");
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MODULE_AUTHOR("Yakir Yang <ykk@rock-chips.com>");
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MODULE_DESCRIPTION("IMX6 Specific DW-HDMI Driver Extension");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("platform:dwhdmi-imx");
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