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6d0ef316b9
linux/arch/x86/kernel/cpu
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Pu Wen 6d0ef316b9 x86/events: Add Hygon Dhyana support to PMU infrastructure 
The PMU architecture for the Hygon Dhyana CPU is similar to the AMD
Family 17h one. To support it, call amd_pmu_init() to share the AMD PMU
initialization flow, and change the PMU name to "HYGON".

The Hygon Dhyana CPU supports both legacy and extension PMC MSRs (perf
counter registers and event selection registers), so add Hygon Dhyana
support in the similar way as AMD does.

Signed-off-by: Pu Wen <puwen@hygon.cn>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
Cc: tglx@linutronix.de
Cc: mingo@redhat.com
Cc: hpa@zytor.com
Cc: x86@kernel.org
Cc: thomas.lendacky@amd.com
Link: https://lkml.kernel.org/r/9d93ed54a975f33ef7247e0967960f4ce5d3d990.1537533369.git.puwen@hygon.cn
2018-09-27 18:28:57 +02:00
..
mcheck libnvdimm-for-4.19_dax-memory-failure 2018-08-25 18:43:59 -07:00
microcode x86/microcode: Update the new microcode revision unconditionally 2018-09-02 14:10:54 +02:00
mtrr x86/cpu/mtrr: Support TOP_MEM2 and get MTRR number 2018-09-27 18:28:57 +02:00
.gitignore
amd.c Merge branch 'l1tf-final' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 2018-08-14 09:46:06 -07:00
aperfmperf.c
bugs.c x86/speculation/l1tf: Increase l1tf memory limit for Nehalem+ 2018-08-27 10:29:14 +02:00
cacheinfo.c x86/cpu: Get cache info and setup cache cpumap for Hygon Dhyana 2018-09-27 18:28:57 +02:00
centaur.c x86/CPU: Move x86_cpuinfo::x86_max_cores assignment to detect_num_cpu_cores() 2018-05-13 16:14:24 +02:00
common.c x86/CPU: Change query logic so CPUID is enabled before testing 2018-09-22 11:47:39 +02:00
cpu.h x86/cpu: Get cache info and setup cache cpumap for Hygon Dhyana 2018-09-27 18:28:57 +02:00
cpuid-deps.c x86/cpuid: Switch to 'static const' specifier 2018-03-08 12:23:42 +01:00
cyrix.c x86/CPU: Use correct macros for Cyrix calls 2018-09-22 11:46:56 +02:00
hygon.c x86/cpu: Get cache info and setup cache cpumap for Hygon Dhyana 2018-09-27 18:28:57 +02:00
hypervisor.c
intel_pconfig.c x86/pconfig: Detect PCONFIG targets 2018-03-12 12:10:54 +01:00
intel_rdt_ctrlmondata.c x86/intel_rdt: Resctrl files reflect pseudo-locked information 2018-06-23 13:03:50 +02:00
intel_rdt_monitor.c x86/intel_rdt/mba_sc: Feedback loop to dynamically update mem bandwidth 2018-05-19 13:16:44 +02:00
intel_rdt_pseudo_lock_event.h x86/intel_rdt: Support L3 cache performance event of Broadwell 2018-06-24 15:35:48 +02:00
intel_rdt_pseudo_lock.c x86/intel_rdt: Disable PMU access 2018-08-03 13:06:35 +02:00
intel_rdt_rdtgroup.c Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next 2018-08-15 15:04:25 -07:00
intel_rdt.c x86/intel_rdt: Ensure RDT cleanup on exit 2018-06-23 13:03:50 +02:00
intel_rdt.h x86/intel_rdt: Support restoration of subset of permissions 2018-07-03 08:38:40 +02:00
intel.c x86/spectre: Add missing family 6 check to microcode check 2018-08-27 10:29:14 +02:00
Makefile x86/cpu: Create Hygon Dhyana architecture support file 2018-09-27 16:14:05 +02:00
match.c
mkcapflags.sh
mshyperv.c Drivers: hv: vmbus: Make TLFS #define names architecture neutral 2018-07-03 13:09:15 +02:00
perfctr-watchdog.c x86/events: Add Hygon Dhyana support to PMU infrastructure 2018-09-27 18:28:57 +02:00
powerflags.c
proc.c x86/cpu: Change type of x86_cache_size variable to unsigned int 2018-02-15 01:15:53 +01:00
rdrand.c
scattered.c
topology.c x86/cpu/topology: Provide detect_extended_topology_early() 2018-06-21 14:20:59 +02:00
transmeta.c
umc.c
vmware.c