linux/drivers/scsi/ufs/ufs-mediatek.h
Stanley Chu 722adbbd70 scsi: ufs: ufs-mediatek: gate ref-clk during Auto-Hibern8
In current UFS driver design, hba->uic_link_state will not be changed after
link enters Hibern8 state by Auto-Hibern8 mechanism.  In this case,
reference clock gating will be skipped unless special handling is
implemented in vendor's callbacks.

Support reference clock gating during Auto-Hibern8 period in MediaTek
Chipsets: If link state is already in Hibern8 while Auto-Hibern8 feature is
enabled, gate reference clock in setup_clocks callback.

Link: https://lore.kernel.org/r/20200129105251.12466-5-stanley.chu@mediatek.com
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Bean Huo <beanhuo@micron.com>
Signed-off-by: Stanley Chu <stanley.chu@mediatek.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2020-02-10 22:46:54 -05:00

98 lines
2.2 KiB
C

/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2019 MediaTek Inc.
*/
#ifndef _UFS_MEDIATEK_H
#define _UFS_MEDIATEK_H
#include <linux/bitops.h>
#include <linux/soc/mediatek/mtk_sip_svc.h>
/*
* Vendor specific UFSHCI Registers
*/
#define REG_UFS_REFCLK_CTRL 0x144
#define REG_UFS_EXTREG 0x2100
#define REG_UFS_MPHYCTRL 0x2200
#define REG_UFS_REJECT_MON 0x22AC
#define REG_UFS_DEBUG_SEL 0x22C0
#define REG_UFS_PROBE 0x22C8
/*
* Ref-clk control
*
* Values for register REG_UFS_REFCLK_CTRL
*/
#define REFCLK_RELEASE 0x0
#define REFCLK_REQUEST BIT(0)
#define REFCLK_ACK BIT(1)
#define REFCLK_REQ_TIMEOUT_MS 3
/*
* Vendor specific pre-defined parameters
*/
#define UFS_MTK_LIMIT_NUM_LANES_RX 1
#define UFS_MTK_LIMIT_NUM_LANES_TX 1
#define UFS_MTK_LIMIT_HSGEAR_RX UFS_HS_G3
#define UFS_MTK_LIMIT_HSGEAR_TX UFS_HS_G3
#define UFS_MTK_LIMIT_PWMGEAR_RX UFS_PWM_G4
#define UFS_MTK_LIMIT_PWMGEAR_TX UFS_PWM_G4
#define UFS_MTK_LIMIT_RX_PWR_PWM SLOW_MODE
#define UFS_MTK_LIMIT_TX_PWR_PWM SLOW_MODE
#define UFS_MTK_LIMIT_RX_PWR_HS FAST_MODE
#define UFS_MTK_LIMIT_TX_PWR_HS FAST_MODE
#define UFS_MTK_LIMIT_HS_RATE PA_HS_MODE_B
#define UFS_MTK_LIMIT_DESIRED_MODE UFS_HS_MODE
/*
* Other attributes
*/
#define VS_DEBUGCLOCKENABLE 0xD0A1
#define VS_SAVEPOWERCONTROL 0xD0A6
#define VS_UNIPROPOWERDOWNCONTROL 0xD0A8
/*
* Vendor specific link state
*/
enum {
VS_LINK_DISABLED = 0,
VS_LINK_DOWN = 1,
VS_LINK_UP = 2,
VS_LINK_HIBERN8 = 3,
VS_LINK_LOST = 4,
VS_LINK_CFG = 5,
};
/*
* SiP commands
*/
#define MTK_SIP_UFS_CONTROL MTK_SIP_SMC_CMD(0x276)
#define UFS_MTK_SIP_DEVICE_RESET BIT(1)
#define UFS_MTK_SIP_REF_CLK_NOTIFICATION BIT(3)
/*
* VS_DEBUGCLOCKENABLE
*/
enum {
TX_SYMBOL_CLK_REQ_FORCE = 5,
};
/*
* VS_SAVEPOWERCONTROL
*/
enum {
RX_SYMBOL_CLK_GATE_EN = 0,
SYS_CLK_GATE_EN = 2,
TX_CLK_GATE_EN = 3,
};
struct ufs_mtk_host {
struct ufs_hba *hba;
struct phy *mphy;
bool ref_clk_enabled;
};
#endif /* !_UFS_MEDIATEK_H */