forked from Minki/linux
825637b9c0
DSI byte clock and pixel clocks are sourced from DSI PLL. This change adds the DSI PLL source clock driver under common clock framework. This change handles DSI 28nm PLL only. Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Wentao Xu <wentaox@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
65 lines
1.4 KiB
Makefile
65 lines
1.4 KiB
Makefile
ccflags-y := -Iinclude/drm -Idrivers/gpu/drm/msm
|
|
ccflags-$(CONFIG_DRM_MSM_DSI_PLL) += -Idrivers/gpu/drm/msm/dsi
|
|
|
|
msm-y := \
|
|
adreno/adreno_device.o \
|
|
adreno/adreno_gpu.o \
|
|
adreno/a3xx_gpu.o \
|
|
adreno/a4xx_gpu.o \
|
|
hdmi/hdmi.o \
|
|
hdmi/hdmi_audio.o \
|
|
hdmi/hdmi_bridge.o \
|
|
hdmi/hdmi_connector.o \
|
|
hdmi/hdmi_i2c.o \
|
|
hdmi/hdmi_phy_8960.o \
|
|
hdmi/hdmi_phy_8x60.o \
|
|
hdmi/hdmi_phy_8x74.o \
|
|
edp/edp.o \
|
|
edp/edp_aux.o \
|
|
edp/edp_bridge.o \
|
|
edp/edp_connector.o \
|
|
edp/edp_ctrl.o \
|
|
edp/edp_phy.o \
|
|
mdp/mdp_format.o \
|
|
mdp/mdp_kms.o \
|
|
mdp/mdp4/mdp4_crtc.o \
|
|
mdp/mdp4/mdp4_dtv_encoder.o \
|
|
mdp/mdp4/mdp4_lcdc_encoder.o \
|
|
mdp/mdp4/mdp4_lvds_connector.o \
|
|
mdp/mdp4/mdp4_irq.o \
|
|
mdp/mdp4/mdp4_kms.o \
|
|
mdp/mdp4/mdp4_plane.o \
|
|
mdp/mdp5/mdp5_cfg.o \
|
|
mdp/mdp5/mdp5_ctl.o \
|
|
mdp/mdp5/mdp5_crtc.o \
|
|
mdp/mdp5/mdp5_encoder.o \
|
|
mdp/mdp5/mdp5_irq.o \
|
|
mdp/mdp5/mdp5_kms.o \
|
|
mdp/mdp5/mdp5_plane.o \
|
|
mdp/mdp5/mdp5_smp.o \
|
|
msm_atomic.o \
|
|
msm_drv.o \
|
|
msm_fb.o \
|
|
msm_gem.o \
|
|
msm_gem_prime.o \
|
|
msm_gem_submit.o \
|
|
msm_gpu.o \
|
|
msm_iommu.o \
|
|
msm_perf.o \
|
|
msm_rd.o \
|
|
msm_ringbuffer.o
|
|
|
|
msm-$(CONFIG_DRM_MSM_FBDEV) += msm_fbdev.o
|
|
msm-$(CONFIG_COMMON_CLK) += mdp/mdp4/mdp4_lvds_pll.o
|
|
|
|
msm-$(CONFIG_DRM_MSM_DSI) += dsi/dsi.o \
|
|
dsi/dsi_host.o \
|
|
dsi/dsi_manager.o \
|
|
dsi/dsi_phy.o \
|
|
mdp/mdp5/mdp5_cmd_encoder.o
|
|
|
|
msm-$(CONFIG_DRM_MSM_DSI_PLL) += dsi/pll/dsi_pll.o \
|
|
dsi/pll/dsi_pll_28nm.o
|
|
|
|
obj-$(CONFIG_DRM_MSM) += msm.o
|