forked from Minki/linux
acaa71a6c7
Used for Gru/Kevin only, as they're the only ones which have a described CPU regulator. Also, I'm not sure we've validated this table non-Gru boards. At the same time, partially describe PWM regulators for Gru, so cpufreq doesn't think it can crank up the clock speed without changing the voltage. However, we don't yet have the DT bindings to fully describe the Over Voltage Protection (OVP) circuits on these boards. Without that description, we might end up changing the voltage too much, too fast. Add the pwm-regulator descriptions and associate the CPU OPPs, but leave them disabled. Signed-off-by: Brian Norris <briannorris@chromium.org> [shared gru/kevin parts on a gru device] Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> [with a bit of reordering] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
146 lines
3.8 KiB
Plaintext
146 lines
3.8 KiB
Plaintext
/*
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* Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/ {
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cluster0_opp: opp-table0 {
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compatible = "operating-points-v2";
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opp-shared;
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opp00 {
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opp-hz = /bits/ 64 <408000000>;
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opp-microvolt = <800000>;
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clock-latency-ns = <40000>;
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};
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opp01 {
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opp-hz = /bits/ 64 <600000000>;
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opp-microvolt = <800000>;
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};
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opp02 {
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opp-hz = /bits/ 64 <816000000>;
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opp-microvolt = <800000>;
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};
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opp03 {
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opp-hz = /bits/ 64 <1008000000>;
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opp-microvolt = <875000>;
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};
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opp04 {
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opp-hz = /bits/ 64 <1200000000>;
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opp-microvolt = <925000>;
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};
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opp05 {
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opp-hz = /bits/ 64 <1416000000>;
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opp-microvolt = <1050000>;
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};
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opp06 {
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opp-hz = /bits/ 64 <1512000000>;
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opp-microvolt = <1125000>;
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};
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};
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cluster1_opp: opp-table1 {
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compatible = "operating-points-v2";
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opp-shared;
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opp00 {
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opp-hz = /bits/ 64 <408000000>;
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opp-microvolt = <800000>;
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clock-latency-ns = <40000>;
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};
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opp01 {
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opp-hz = /bits/ 64 <600000000>;
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opp-microvolt = <800000>;
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};
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opp02 {
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opp-hz = /bits/ 64 <816000000>;
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opp-microvolt = <825000>;
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};
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opp03 {
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opp-hz = /bits/ 64 <1008000000>;
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opp-microvolt = <875000>;
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};
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opp04 {
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opp-hz = /bits/ 64 <1200000000>;
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opp-microvolt = <950000>;
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};
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opp05 {
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opp-hz = /bits/ 64 <1416000000>;
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opp-microvolt = <1025000>;
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};
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opp06 {
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opp-hz = /bits/ 64 <1608000000>;
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opp-microvolt = <1075000>;
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};
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opp07 {
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opp-hz = /bits/ 64 <1800000000>;
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opp-microvolt = <1150000>;
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};
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opp08 {
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opp-hz = /bits/ 64 <2016000000>;
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opp-microvolt = <1250000>;
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};
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};
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};
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&cpu_l0 {
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operating-points-v2 = <&cluster0_opp>;
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};
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&cpu_l1 {
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operating-points-v2 = <&cluster0_opp>;
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};
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&cpu_l2 {
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operating-points-v2 = <&cluster0_opp>;
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};
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&cpu_l3 {
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operating-points-v2 = <&cluster0_opp>;
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};
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&cpu_b0 {
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operating-points-v2 = <&cluster1_opp>;
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};
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&cpu_b1 {
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operating-points-v2 = <&cluster1_opp>;
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};
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