forked from Minki/linux
6b5de09121
Adding the minimum device tree files required for OMAP5 to boot. Reviewed-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
185 lines
3.9 KiB
Plaintext
185 lines
3.9 KiB
Plaintext
/*
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* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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* Based on "omap4.dtsi"
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*/
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/*
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* Carveout for multimedia usecases
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* It should be the last 48MB of the first 512MB memory part
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* In theory, it should not even exist. That zone should be reserved
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* dynamically during the .reserve callback.
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*/
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/memreserve/ 0x9d000000 0x03000000;
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/include/ "skeleton.dtsi"
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/ {
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compatible = "ti,omap5";
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interrupt-parent = <&gic>;
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aliases {
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serial0 = &uart1;
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serial1 = &uart2;
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serial2 = &uart3;
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serial3 = &uart4;
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serial4 = &uart5;
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serial5 = &uart6;
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};
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cpus {
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cpu@0 {
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compatible = "arm,cortex-a15";
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};
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cpu@1 {
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compatible = "arm,cortex-a15";
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};
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};
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/*
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* The soc node represents the soc top level view. It is uses for IPs
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* that are not memory mapped in the MPU view or for the MPU itself.
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*/
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soc {
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compatible = "ti,omap-infra";
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mpu {
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compatible = "ti,omap5-mpu";
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ti,hwmods = "mpu";
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};
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};
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/*
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* XXX: Use a flat representation of the OMAP3 interconnect.
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* The real OMAP interconnect network is quite complex.
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* Since that will not bring real advantage to represent that in DT for
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* the moment, just use a fake OCP bus entry to represent the whole bus
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* hierarchy.
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*/
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ocp {
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compatible = "ti,omap4-l3-noc", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
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gic: interrupt-controller@48211000 {
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compatible = "arm,cortex-a15-gic";
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interrupt-controller;
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#interrupt-cells = <3>;
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reg = <0x48211000 0x1000>,
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<0x48212000 0x1000>;
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};
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gpio1: gpio@4ae10000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio1";
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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gpio2: gpio@48055000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio2";
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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gpio3: gpio@48057000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio3";
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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gpio4: gpio@48059000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio4";
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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gpio5: gpio@4805b000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio5";
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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gpio6: gpio@4805d000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio6";
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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gpio7: gpio@48051000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio7";
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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gpio8: gpio@48053000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio8";
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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uart1: serial@4806a000 {
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compatible = "ti,omap4-uart";
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ti,hwmods = "uart1";
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clock-frequency = <48000000>;
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};
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uart2: serial@4806c000 {
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compatible = "ti,omap4-uart";
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ti,hwmods = "uart2";
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clock-frequency = <48000000>;
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};
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uart3: serial@48020000 {
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compatible = "ti,omap4-uart";
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ti,hwmods = "uart3";
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clock-frequency = <48000000>;
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};
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uart4: serial@4806e000 {
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compatible = "ti,omap4-uart";
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ti,hwmods = "uart4";
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clock-frequency = <48000000>;
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};
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uart5: serial@48066000 {
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compatible = "ti,omap5-uart";
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ti,hwmods = "uart5";
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clock-frequency = <48000000>;
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};
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uart6: serial@48068000 {
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compatible = "ti,omap6-uart";
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ti,hwmods = "uart6";
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clock-frequency = <48000000>;
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};
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};
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};
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