forked from Minki/linux
4b6e326b2d
Removed oom task unconditional rescheduling every 250ms and created per queue oom work queue for refilling buffers. The oom task refills only if the available descriptors is fallen to 64. There will be no packets coming in after hitting this level. So NAPI will not run until oom task refills the buffers. Signed-off-by: Intiyaz Basha <intiyaz.basha@cavium.com> Acked-by: Derek Chickles <derek.chickles@cavium.com> Signed-off-by: Felix Manlunas <felix.manlunas@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
236 lines
6.8 KiB
C
236 lines
6.8 KiB
C
/**********************************************************************
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* Author: Cavium, Inc.
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*
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* Contact: support@cavium.com
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* Please include "LiquidIO" in the subject.
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*
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* Copyright (c) 2003-2016 Cavium, Inc.
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*
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* This file is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, Version 2, as
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* published by the Free Software Foundation.
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*
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* This file is distributed in the hope that it will be useful, but
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* AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
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* NONINFRINGEMENT. See the GNU General Public License for more details.
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***********************************************************************/
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/*! \file octeon_main.h
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* \brief Host Driver: This file is included by all host driver source files
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* to include common definitions.
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*/
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#ifndef _OCTEON_MAIN_H_
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#define _OCTEON_MAIN_H_
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#include <linux/sched/signal.h>
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#if BITS_PER_LONG == 32
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#define CVM_CAST64(v) ((long long)(v))
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#elif BITS_PER_LONG == 64
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#define CVM_CAST64(v) ((long long)(long)(v))
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#else
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#error "Unknown system architecture"
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#endif
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#define DRV_NAME "LiquidIO"
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struct octeon_device_priv {
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/** Tasklet structures for this device. */
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struct tasklet_struct droq_tasklet;
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unsigned long napi_mask;
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};
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/** This structure is used by NIC driver to store information required
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* to free the sk_buff when the packet has been fetched by Octeon.
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* Bytes offset below assume worst-case of a 64-bit system.
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*/
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struct octnet_buf_free_info {
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/** Bytes 1-8. Pointer to network device private structure. */
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struct lio *lio;
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/** Bytes 9-16. Pointer to sk_buff. */
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struct sk_buff *skb;
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/** Bytes 17-24. Pointer to gather list. */
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struct octnic_gather *g;
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/** Bytes 25-32. Physical address of skb->data or gather list. */
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u64 dptr;
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/** Bytes 33-47. Piggybacked soft command, if any */
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struct octeon_soft_command *sc;
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};
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/* BQL-related functions */
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int octeon_report_sent_bytes_to_bql(void *buf, int reqtype);
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void octeon_update_tx_completion_counters(void *buf, int reqtype,
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unsigned int *pkts_compl,
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unsigned int *bytes_compl);
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void octeon_report_tx_completion_to_bql(void *txq, unsigned int pkts_compl,
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unsigned int bytes_compl);
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void octeon_pf_changed_vf_macaddr(struct octeon_device *oct, u8 *mac);
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void octeon_schedule_rxq_oom_work(struct octeon_device *oct,
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struct octeon_droq *droq);
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/** Swap 8B blocks */
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static inline void octeon_swap_8B_data(u64 *data, u32 blocks)
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{
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while (blocks) {
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cpu_to_be64s(data);
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blocks--;
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data++;
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}
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}
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/**
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* \brief unmaps a PCI BAR
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* @param oct Pointer to Octeon device
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* @param baridx bar index
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*/
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static inline void octeon_unmap_pci_barx(struct octeon_device *oct, int baridx)
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{
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dev_dbg(&oct->pci_dev->dev, "Freeing PCI mapped regions for Bar%d\n",
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baridx);
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if (oct->mmio[baridx].done)
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iounmap(oct->mmio[baridx].hw_addr);
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if (oct->mmio[baridx].start)
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pci_release_region(oct->pci_dev, baridx * 2);
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}
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/**
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* \brief maps a PCI BAR
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* @param oct Pointer to Octeon device
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* @param baridx bar index
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* @param max_map_len maximum length of mapped memory
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*/
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static inline int octeon_map_pci_barx(struct octeon_device *oct,
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int baridx, int max_map_len)
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{
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u32 mapped_len = 0;
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if (pci_request_region(oct->pci_dev, baridx * 2, DRV_NAME)) {
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dev_err(&oct->pci_dev->dev, "pci_request_region failed for bar %d\n",
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baridx);
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return 1;
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}
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oct->mmio[baridx].start = pci_resource_start(oct->pci_dev, baridx * 2);
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oct->mmio[baridx].len = pci_resource_len(oct->pci_dev, baridx * 2);
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mapped_len = oct->mmio[baridx].len;
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if (!mapped_len)
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goto err_release_region;
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if (max_map_len && (mapped_len > max_map_len))
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mapped_len = max_map_len;
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oct->mmio[baridx].hw_addr =
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ioremap(oct->mmio[baridx].start, mapped_len);
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oct->mmio[baridx].mapped_len = mapped_len;
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dev_dbg(&oct->pci_dev->dev, "BAR%d start: 0x%llx mapped %u of %u bytes\n",
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baridx, oct->mmio[baridx].start, mapped_len,
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oct->mmio[baridx].len);
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if (!oct->mmio[baridx].hw_addr) {
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dev_err(&oct->pci_dev->dev, "error ioremap for bar %d\n",
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baridx);
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goto err_release_region;
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}
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oct->mmio[baridx].done = 1;
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return 0;
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err_release_region:
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pci_release_region(oct->pci_dev, baridx * 2);
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return 1;
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}
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/* input parameter:
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* sc: pointer to a soft request
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* timeout: milli sec which an application wants to wait for the
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response of the request.
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* 0: the request will wait until its response gets back
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* from the firmware within LIO_SC_MAX_TMO_MS milli sec.
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* It the response does not return within
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* LIO_SC_MAX_TMO_MS milli sec, lio_process_ordered_list()
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* will move the request to zombie response list.
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*
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* return value:
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* 0: got the response from firmware for the sc request.
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* errno -EINTR: user abort the command.
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* errno -ETIME: user spefified timeout value has been expired.
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* errno -EBUSY: the response of the request does not return in
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* resonable time (LIO_SC_MAX_TMO_MS).
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* the sc wll be move to zombie response list by
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* lio_process_ordered_list()
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*
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* A request with non-zero return value, the sc->caller_is_done
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* will be marked 1.
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* When getting a request with zero return value, the requestor
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* should mark sc->caller_is_done with 1 after examing the
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* response of sc.
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* lio_process_ordered_list() will free the soft command on behalf
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* of the soft command requestor.
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* This is to fix the possible race condition of both timeout process
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* and lio_process_ordered_list()/callback function to free a
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* sc strucutre.
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*/
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static inline int
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wait_for_sc_completion_timeout(struct octeon_device *oct_dev,
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struct octeon_soft_command *sc,
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unsigned long timeout)
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{
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int errno = 0;
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long timeout_jiff;
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if (timeout)
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timeout_jiff = msecs_to_jiffies(timeout);
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else
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timeout_jiff = MAX_SCHEDULE_TIMEOUT;
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timeout_jiff =
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wait_for_completion_interruptible_timeout(&sc->complete,
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timeout_jiff);
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if (timeout_jiff == 0) {
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dev_err(&oct_dev->pci_dev->dev, "%s: sc is timeout\n",
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__func__);
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WRITE_ONCE(sc->caller_is_done, true);
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errno = -ETIME;
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} else if (timeout_jiff == -ERESTARTSYS) {
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dev_err(&oct_dev->pci_dev->dev, "%s: sc is interrupted\n",
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__func__);
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WRITE_ONCE(sc->caller_is_done, true);
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errno = -EINTR;
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} else if (sc->sc_status == OCTEON_REQUEST_TIMEOUT) {
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dev_err(&oct_dev->pci_dev->dev, "%s: sc has fatal timeout\n",
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__func__);
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WRITE_ONCE(sc->caller_is_done, true);
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errno = -EBUSY;
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}
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return errno;
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}
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#ifndef ROUNDUP4
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#define ROUNDUP4(val) (((val) + 3) & 0xfffffffc)
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#endif
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#ifndef ROUNDUP8
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#define ROUNDUP8(val) (((val) + 7) & 0xfffffff8)
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#endif
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#ifndef ROUNDUP16
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#define ROUNDUP16(val) (((val) + 15) & 0xfffffff0)
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#endif
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#ifndef ROUNDUP128
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#define ROUNDUP128(val) (((val) + 127) & 0xffffff80)
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#endif
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#endif /* _OCTEON_MAIN_H_ */
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