forked from Minki/linux
695b95b810
Wait loop can be interrupted by signal, so if signals are raised periodically (e.g. SIGALRM) this loop may never finish. Use emission time as a base for fence timeout. Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com> |
||
---|---|---|
.. | ||
drm | ||
stub | ||
vga | ||
Makefile |