forked from Minki/linux
72a7fe3967
This patchset adds a flags variable to reserve_bootmem() and uses the BOOTMEM_EXCLUSIVE flag in crashkernel reservation code to detect collisions between crashkernel area and already used memory. This patch: Change the reserve_bootmem() function to accept a new flag BOOTMEM_EXCLUSIVE. If that flag is set, the function returns with -EBUSY if the memory already has been reserved in the past. This is to avoid conflicts. Because that code runs before SMP initialisation, there's no race condition inside reserve_bootmem_core(). [akpm@linux-foundation.org: coding-style fixes] [akpm@linux-foundation.org: fix powerpc build] Signed-off-by: Bernhard Walle <bwalle@suse.de> Cc: <linux-arch@vger.kernel.org> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Cc: Vivek Goyal <vgoyal@in.ibm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
203 lines
5.0 KiB
C
203 lines
5.0 KiB
C
/*
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* arch/v850/kernel/anna.c -- Anna V850E2 evaluation chip/board
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*
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* Copyright (C) 2002,03 NEC Electronics Corporation
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* Copyright (C) 2002,03 Miles Bader <miles@gnu.org>
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file COPYING in the main directory of this
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* archive for more details.
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*
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* Written by Miles Bader <miles@gnu.org>
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/bootmem.h>
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#include <linux/major.h>
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#include <linux/irq.h>
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#include <asm/machdep.h>
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#include <asm/atomic.h>
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#include <asm/page.h>
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#include <asm/v850e_timer_d.h>
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#include <asm/v850e_uart.h>
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#include "mach.h"
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/* SRAM and SDRAM are vaguely contiguous (with a big hole in between; see
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mach_reserve_bootmem for details); use both as one big area. */
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#define RAM_START SRAM_ADDR
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#define RAM_END (SDRAM_ADDR + SDRAM_SIZE)
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/* The bits of this port are connected to an 8-LED bar-graph. */
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#define LEDS_PORT 0
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static void anna_led_tick (void);
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void __init mach_early_init (void)
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{
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ANNA_ILBEN = 0;
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V850E2_CSC(0) = 0x402F;
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V850E2_CSC(1) = 0x4000;
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V850E2_BPC = 0;
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V850E2_BSC = 0xAAAA;
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V850E2_BEC = 0;
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#if 0
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V850E2_BHC = 0xFFFF; /* icache all memory, dcache all */
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#else
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V850E2_BHC = 0; /* cache no memory */
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#endif
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V850E2_BCT(0) = 0xB088;
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V850E2_BCT(1) = 0x0008;
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V850E2_DWC(0) = 0x0027;
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V850E2_DWC(1) = 0;
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V850E2_BCC = 0x0006;
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V850E2_ASC = 0;
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V850E2_LBS = 0x0089;
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V850E2_SCR(3) = 0x21A9;
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V850E2_RFS(3) = 0x8121;
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v850e_intc_disable_irqs ();
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}
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void __init mach_setup (char **cmdline)
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{
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ANNA_PORT_PM (LEDS_PORT) = 0; /* Make all LED pins output pins. */
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mach_tick = anna_led_tick;
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}
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void __init mach_get_physical_ram (unsigned long *ram_start,
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unsigned long *ram_len)
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{
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*ram_start = RAM_START;
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*ram_len = RAM_END - RAM_START;
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}
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void __init mach_reserve_bootmem ()
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{
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/* The space between SRAM and SDRAM is filled with duplicate
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images of SRAM. Prevent the kernel from using them. */
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reserve_bootmem (SRAM_ADDR + SRAM_SIZE,
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SDRAM_ADDR - (SRAM_ADDR + SRAM_SIZE),
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BOOTMEM_DEFAULT);
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}
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void mach_gettimeofday (struct timespec *tv)
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{
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tv->tv_sec = 0;
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tv->tv_nsec = 0;
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}
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void __init mach_sched_init (struct irqaction *timer_action)
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{
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/* Start hardware timer. */
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v850e_timer_d_configure (0, HZ);
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/* Install timer interrupt handler. */
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setup_irq (IRQ_INTCMD(0), timer_action);
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}
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static struct v850e_intc_irq_init irq_inits[] = {
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{ "IRQ", 0, NUM_MACH_IRQS, 1, 7 },
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{ "PIN", IRQ_INTP(0), IRQ_INTP_NUM, 1, 4 },
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{ "CCC", IRQ_INTCCC(0), IRQ_INTCCC_NUM, 1, 5 },
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{ "CMD", IRQ_INTCMD(0), IRQ_INTCMD_NUM, 1, 5 },
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{ "DMA", IRQ_INTDMA(0), IRQ_INTDMA_NUM, 1, 2 },
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{ "DMXER", IRQ_INTDMXER,1, 1, 2 },
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{ "SRE", IRQ_INTSRE(0), IRQ_INTSRE_NUM, 3, 3 },
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{ "SR", IRQ_INTSR(0), IRQ_INTSR_NUM, 3, 4 },
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{ "ST", IRQ_INTST(0), IRQ_INTST_NUM, 3, 5 },
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{ 0 }
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};
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#define NUM_IRQ_INITS (ARRAY_SIZE(irq_inits) - 1)
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static struct hw_interrupt_type hw_itypes[NUM_IRQ_INITS];
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void __init mach_init_irqs (void)
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{
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v850e_intc_init_irq_types (irq_inits, hw_itypes);
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}
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void machine_restart (char *__unused)
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{
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#ifdef CONFIG_RESET_GUARD
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disable_reset_guard ();
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#endif
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asm ("jmp r0"); /* Jump to the reset vector. */
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}
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void machine_halt (void)
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{
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#ifdef CONFIG_RESET_GUARD
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disable_reset_guard ();
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#endif
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local_irq_disable (); /* Ignore all interrupts. */
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ANNA_PORT_IO(LEDS_PORT) = 0xAA; /* Note that we halted. */
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for (;;)
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asm ("halt; nop; nop; nop; nop; nop");
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}
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void machine_power_off (void)
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{
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machine_halt ();
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}
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/* Called before configuring an on-chip UART. */
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void anna_uart_pre_configure (unsigned chan, unsigned cflags, unsigned baud)
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{
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/* The Anna connects some general-purpose I/O pins on the CPU to
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the RTS/CTS lines of UART 1's serial connection. I/O pins P07
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and P37 are RTS and CTS respectively. */
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if (chan == 1) {
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ANNA_PORT_PM(0) &= ~0x80; /* P07 in output mode */
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ANNA_PORT_PM(3) |= 0x80; /* P37 in input mode */
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}
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}
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/* Minimum and maximum bounds for the moving upper LED boundary in the
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clock tick display. We can't use the last bit because it's used for
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UART0's CTS output. */
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#define MIN_MAX_POS 0
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#define MAX_MAX_POS 6
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/* There are MAX_MAX_POS^2 - MIN_MAX_POS^2 cycles in the animation, so if
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we pick 6 and 0 as above, we get 49 cycles, which is when divided into
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the standard 100 value for HZ, gives us an almost 1s total time. */
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#define TICKS_PER_FRAME \
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(HZ / (MAX_MAX_POS * MAX_MAX_POS - MIN_MAX_POS * MIN_MAX_POS))
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static void anna_led_tick ()
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{
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static unsigned counter = 0;
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if (++counter == TICKS_PER_FRAME) {
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static int pos = 0, max_pos = MAX_MAX_POS, dir = 1;
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if (dir > 0 && pos == max_pos) {
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dir = -1;
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if (max_pos == MIN_MAX_POS)
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max_pos = MAX_MAX_POS;
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else
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max_pos--;
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} else {
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if (dir < 0 && pos == 0)
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dir = 1;
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if (pos + dir <= max_pos) {
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/* Each bit of port 0 has a LED. */
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clear_bit (pos, &ANNA_PORT_IO(LEDS_PORT));
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pos += dir;
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set_bit (pos, &ANNA_PORT_IO(LEDS_PORT));
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}
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}
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counter = 0;
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}
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}
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