forked from Minki/linux
897cfcd878
This patch reworks the highlander irq code for r7780mp and r7785rp. The same strategy as for the new R2D code is used here - the board specific interrupts are now starting from HL_FPGA_IRQ_BASE. The code for r7780rp is not touched due to lack of hardware. Tested with CF, AX88796 on r7780mp and r7785rp. The touch switch interrupt has also been tested on r7780mp. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
66 lines
1.7 KiB
C
66 lines
1.7 KiB
C
/*
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* Renesas Solutions Highlander R7785RP Support.
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*
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* Copyright (C) 2002 Atom Create Engineering Co., Ltd.
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* Copyright (C) 2006 Paul Mundt
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* Copyright (C) 2007 Magnus Damm
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <asm/r7780rp.h>
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enum {
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UNUSED = 0,
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/* board specific interrupt sources */
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AX88796, /* Ethernet controller */
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CF, /* Compact Flash */
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};
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static struct intc_vect vectors[] __initdata = {
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INTC_IRQ(CF, IRQ_CF),
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INTC_IRQ(AX88796, IRQ_AX88796),
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};
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static struct intc_mask_reg mask_registers[] __initdata = {
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{ 0xa4000010, 0, 16, /* IRLMCR1 */
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{ 0, 0, 0, 0, CF, AX88796, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0 } },
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};
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static unsigned char irl2irq[HL_NR_IRL] __initdata = {
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0, IRQ_CF, 0, 0,
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0, 0, 0, 0,
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0, 0, IRQ_AX88796, 0,
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0, 0, 0,
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};
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static DECLARE_INTC_DESC(intc_desc, "r7785rp", vectors,
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NULL, NULL, mask_registers, NULL, NULL);
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unsigned char * __init highlander_init_irq_r7785rp(void)
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{
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if ((ctrl_inw(0xa4000158) & 0xf000) != 0x1000)
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return NULL;
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printk(KERN_INFO "Using r7785rp interrupt controller.\n");
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ctrl_outw(0x0000, PA_IRLSSR1); /* FPGA IRLSSR1(CF_CD clear) */
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/* Setup the FPGA IRL */
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ctrl_outw(0x0000, PA_IRLPRA); /* FPGA IRLA */
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ctrl_outw(0xe598, PA_IRLPRB); /* FPGA IRLB */
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ctrl_outw(0x7060, PA_IRLPRC); /* FPGA IRLC */
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ctrl_outw(0x0000, PA_IRLPRD); /* FPGA IRLD */
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ctrl_outw(0x4321, PA_IRLPRE); /* FPGA IRLE */
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ctrl_outw(0x0000, PA_IRLPRF); /* FPGA IRLF */
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register_intc_controller(&intc_desc);
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return irl2irq;
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}
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