forked from Minki/linux
e18e7dd334
Attempting to use the MPU while doing XIP out of parallel flash hooked up to the async memory bus would often result in random crashes as the MPU slowly corrupted memory. The fallout here is that the async banks gain MPU protection from user space too. So any accesses have to go through the mmap() interface rather than just using hardcoded pointers. Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
214 lines
5.3 KiB
C
214 lines
5.3 KiB
C
/*
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* Copyright 2004-2009 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#ifndef __BLACKFIN_MMU_CONTEXT_H__
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#define __BLACKFIN_MMU_CONTEXT_H__
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#include <linux/gfp.h>
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#include <linux/sched.h>
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#include <asm/setup.h>
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#include <asm/page.h>
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#include <asm/pgalloc.h>
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#include <asm/cplbinit.h>
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#include <asm/sections.h>
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/* Note: L1 stacks are CPU-private things, so we bluntly disable this
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feature in SMP mode, and use the per-CPU scratch SRAM bank only to
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store the PDA instead. */
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extern void *current_l1_stack_save;
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extern int nr_l1stack_tasks;
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extern void *l1_stack_base;
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extern unsigned long l1_stack_len;
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extern int l1sram_free(const void*);
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extern void *l1sram_alloc_max(void*);
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static inline void free_l1stack(void)
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{
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nr_l1stack_tasks--;
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if (nr_l1stack_tasks == 0)
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l1sram_free(l1_stack_base);
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}
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static inline unsigned long
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alloc_l1stack(unsigned long length, unsigned long *stack_base)
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{
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if (nr_l1stack_tasks == 0) {
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l1_stack_base = l1sram_alloc_max(&l1_stack_len);
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if (!l1_stack_base)
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return 0;
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}
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if (l1_stack_len < length) {
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if (nr_l1stack_tasks == 0)
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l1sram_free(l1_stack_base);
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return 0;
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}
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*stack_base = (unsigned long)l1_stack_base;
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nr_l1stack_tasks++;
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return l1_stack_len;
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}
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static inline int
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activate_l1stack(struct mm_struct *mm, unsigned long sp_base)
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{
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if (current_l1_stack_save)
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memcpy(current_l1_stack_save, l1_stack_base, l1_stack_len);
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mm->context.l1_stack_save = current_l1_stack_save = (void*)sp_base;
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memcpy(l1_stack_base, current_l1_stack_save, l1_stack_len);
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return 1;
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}
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#define deactivate_mm(tsk,mm) do { } while (0)
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#define activate_mm(prev, next) switch_mm(prev, next, NULL)
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static inline void __switch_mm(struct mm_struct *prev_mm, struct mm_struct *next_mm,
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struct task_struct *tsk)
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{
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#ifdef CONFIG_MPU
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unsigned int cpu = smp_processor_id();
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#endif
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if (prev_mm == next_mm)
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return;
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#ifdef CONFIG_MPU
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if (prev_mm->context.page_rwx_mask == current_rwx_mask[cpu]) {
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flush_switched_cplbs(cpu);
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set_mask_dcplbs(next_mm->context.page_rwx_mask, cpu);
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}
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#endif
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#ifdef CONFIG_APP_STACK_L1
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/* L1 stack switching. */
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if (!next_mm->context.l1_stack_save)
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return;
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if (next_mm->context.l1_stack_save == current_l1_stack_save)
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return;
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if (current_l1_stack_save) {
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memcpy(current_l1_stack_save, l1_stack_base, l1_stack_len);
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}
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current_l1_stack_save = next_mm->context.l1_stack_save;
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memcpy(l1_stack_base, current_l1_stack_save, l1_stack_len);
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#endif
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}
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#ifdef CONFIG_IPIPE
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#define lock_mm_switch(flags) local_irq_save_hw_cond(flags)
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#define unlock_mm_switch(flags) local_irq_restore_hw_cond(flags)
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#else
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#define lock_mm_switch(flags) do { (void)(flags); } while (0)
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#define unlock_mm_switch(flags) do { (void)(flags); } while (0)
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#endif /* CONFIG_IPIPE */
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#ifdef CONFIG_MPU
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static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
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struct task_struct *tsk)
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{
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unsigned long flags;
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lock_mm_switch(flags);
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__switch_mm(prev, next, tsk);
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unlock_mm_switch(flags);
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}
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static inline void protect_page(struct mm_struct *mm, unsigned long addr,
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unsigned long flags)
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{
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unsigned long *mask = mm->context.page_rwx_mask;
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unsigned long page;
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unsigned long idx;
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unsigned long bit;
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if (unlikely(addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE))
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page = (addr - (ASYNC_BANK0_BASE - _ramend)) >> 12;
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else
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page = addr >> 12;
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idx = page >> 5;
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bit = 1 << (page & 31);
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if (flags & VM_READ)
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mask[idx] |= bit;
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else
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mask[idx] &= ~bit;
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mask += page_mask_nelts;
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if (flags & VM_WRITE)
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mask[idx] |= bit;
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else
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mask[idx] &= ~bit;
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mask += page_mask_nelts;
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if (flags & VM_EXEC)
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mask[idx] |= bit;
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else
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mask[idx] &= ~bit;
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}
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static inline void update_protections(struct mm_struct *mm)
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{
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unsigned int cpu = smp_processor_id();
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if (mm->context.page_rwx_mask == current_rwx_mask[cpu]) {
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flush_switched_cplbs(cpu);
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set_mask_dcplbs(mm->context.page_rwx_mask, cpu);
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}
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}
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#else /* !CONFIG_MPU */
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static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
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struct task_struct *tsk)
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{
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__switch_mm(prev, next, tsk);
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}
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#endif
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static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
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{
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}
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/* Called when creating a new context during fork() or execve(). */
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static inline int
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init_new_context(struct task_struct *tsk, struct mm_struct *mm)
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{
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#ifdef CONFIG_MPU
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unsigned long p = __get_free_pages(GFP_KERNEL, page_mask_order);
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mm->context.page_rwx_mask = (unsigned long *)p;
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memset(mm->context.page_rwx_mask, 0,
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page_mask_nelts * 3 * sizeof(long));
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#endif
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return 0;
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}
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static inline void destroy_context(struct mm_struct *mm)
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{
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struct sram_list_struct *tmp;
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#ifdef CONFIG_MPU
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unsigned int cpu = smp_processor_id();
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#endif
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#ifdef CONFIG_APP_STACK_L1
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if (current_l1_stack_save == mm->context.l1_stack_save)
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current_l1_stack_save = 0;
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if (mm->context.l1_stack_save)
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free_l1stack();
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#endif
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while ((tmp = mm->context.sram_list)) {
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mm->context.sram_list = tmp->next;
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sram_free(tmp->addr);
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kfree(tmp);
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}
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#ifdef CONFIG_MPU
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if (current_rwx_mask[cpu] == mm->context.page_rwx_mask)
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current_rwx_mask[cpu] = NULL;
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free_pages((unsigned long)mm->context.page_rwx_mask, page_mask_order);
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#endif
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}
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#define ipipe_mm_switch_protect(flags) \
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local_irq_save_hw_cond(flags)
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#define ipipe_mm_switch_unprotect(flags) \
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local_irq_restore_hw_cond(flags)
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#endif
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