forked from Minki/linux
67b17a116f
Add the I2C0 bus and the some of the I2C devices on the Hitex LPC4350 eval board. Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar> Signed-off-by: Joachim Eastwood <manabian@gmail.com>
376 lines
6.6 KiB
Plaintext
376 lines
6.6 KiB
Plaintext
/*
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* Hitex LPC4350 Evaluation Board
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*
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* Copyright 2015 Ariel D'Alessandro <ariel.dalessandro@gmail.com>
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*
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* This code is released using a dual license strategy: BSD/GPL
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* You can choose the licence that better fits your requirements.
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*
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* Released under the terms of 3-clause BSD License
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* Released under the terms of GNU General Public License Version 2.0
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*
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*/
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/dts-v1/;
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#include "lpc18xx.dtsi"
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#include "lpc4350.dtsi"
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/ {
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model = "Hitex LPC4350 Evaluation Board";
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compatible = "hitex,lpc4350-eval-board", "nxp,lpc4350";
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aliases {
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serial0 = &uart0;
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serial1 = &uart1;
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serial2 = &uart2;
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serial3 = &uart3;
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};
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chosen {
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stdout-path = &uart0;
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};
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memory {
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device_type = "memory";
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reg = <0x28000000 0x800000>; /* 8 MB */
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};
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};
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&pinctrl {
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emc_pins: emc-pins {
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emc_addr0_23_cfg {
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pins = "p2_9", "p2_10", "p2_11", "p2_12",
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"p2_13", "p1_0", "p1_1", "p1_2",
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"p2_8", "p2_7", "p2_6", "p2_2",
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"p2_1", "p2_0", "p6_8", "p6_7",
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"pd_16", "pd_15", "pe_0", "pe_1",
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"pe_2", "pe_3", "pe_4", "pa_4";
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function = "emc";
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slew-rate = <1>;
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bias-disable;
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input-enable;
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input-schmitt-disable;
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};
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emc_data0_15_cfg {
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pins = "p1_7", "p1_8", "p1_9", "p1_10",
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"p1_11", "p1_12", "p1_13", "p1_14",
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"p5_4", "p5_5", "p5_6", "p5_7",
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"p5_0", "p5_1", "p5_2", "p5_3";
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function = "emc";
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slew-rate = <1>;
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bias-disable;
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input-enable;
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input-schmitt-disable;
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};
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emc_we_oe_cfg {
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pins = "p1_6", "p1_3";
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function = "emc";
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slew-rate = <1>;
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bias-disable;
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input-enable;
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input-schmitt-disable;
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};
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emc_bls0_3_cfg {
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pins = "p1_4", "p6_6", "pd_13", "pd_10";
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function = "emc";
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slew-rate = <1>;
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bias-disable;
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input-enable;
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input-schmitt-disable;
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};
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emc_cs0_cs2_cfg {
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pins = "p1_5", "pd_12";
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function = "emc";
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slew-rate = <1>;
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bias-disable;
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input-enable;
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input-schmitt-disable;
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};
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emc_sdram_dqm0_3_cfg {
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pins = "p6_12", "p6_10", "pd_0", "pe_13";
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function = "emc";
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slew-rate = <1>;
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bias-disable;
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input-enable;
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input-schmitt-disable;
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};
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emc_sdram_ras_cas_cfg {
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pins = "p6_5", "p6_4";
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function = "emc";
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slew-rate = <1>;
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bias-disable;
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input-enable;
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input-schmitt-disable;
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};
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emc_sdram_dycs0_cfg {
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pins = "p6_9";
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function = "emc";
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slew-rate = <1>;
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bias-disable;
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input-enable;
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input-schmitt-disable;
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};
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emc_sdram_cke_cfg {
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pins = "p6_11";
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function = "emc";
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slew-rate = <1>;
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bias-disable;
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input-enable;
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input-schmitt-disable;
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};
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emc_sdram_clock_cfg {
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pins = "clk0", "clk1", "clk2", "clk3";
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function = "emc";
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slew-rate = <1>;
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bias-disable;
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input-enable;
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input-schmitt-disable;
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};
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};
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enet_mii_pins: enet-mii-pins {
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enet_mii_rxd0_3_cfg {
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pins = "p1_15", "p0_0", "p9_3", "p9_2";
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function = "enet";
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bias-disable;
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input-enable;
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};
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enet_mii_txd0_3_cfg {
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pins = "p1_18", "p1_20", "p9_4", "p9_5";
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function = "enet";
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bias-disable;
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};
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enet_mii_crs_col_cfg {
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pins = "p9_0", "p9_6";
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function = "enet";
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bias-disable;
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input-enable;
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};
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enet_mii_rx_clk_dv_er_cfg {
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pins = "pc_0", "p1_16", "p9_1";
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function = "enet";
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bias-disable;
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input-enable;
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};
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enet_mii_tx_clk_en_cfg {
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pins = "p1_19", "p0_1";
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function = "enet";
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bias-disable;
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input-enable;
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};
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enet_mdio_cfg {
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pins = "p1_17";
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function = "enet";
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bias-disable;
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input-enable;
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};
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enet_mdc_cfg {
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pins = "pc_1";
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function = "enet";
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bias-disable;
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};
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};
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i2c0_pins: i2c0-pins {
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i2c0_pins_cfg {
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pins = "i2c0_scl", "i2c0_sda";
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function = "i2c0";
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input-enable;
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};
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};
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spifi_pins: spifi-pins {
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spifi_clk_cfg {
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pins = "p3_3";
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function = "spifi";
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slew-rate = <1>;
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bias-disable;
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input-enable;
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input-schmitt-disable;
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};
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spifi_mosi_miso_sio2_3_cfg {
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pins = "p3_7", "p3_6", "p3_5", "p3_4";
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function = "spifi";
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slew-rate = <1>;
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bias-disable;
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input-enable;
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input-schmitt-disable;
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};
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spifi_cs_cfg {
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pins = "p3_8";
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function = "spifi";
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slew-rate = <1>;
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bias-disable;
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input-enable;
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input-schmitt-disable;
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};
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};
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uart0_pins: uart0-pins {
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uart0_rx_cfg {
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pins = "pf_11";
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function = "uart0";
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input-schmitt-disable;
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bias-disable;
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input-enable;
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};
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uart0_tx_cfg {
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pins = "pf_10";
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function = "uart0";
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bias-pull-down;
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};
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};
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};
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&emc {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&emc_pins>;
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cs0 {
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#address-cells = <2>;
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#size-cells = <1>;
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ranges;
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mpmc,cs = <0>;
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mpmc,memory-width = <16>;
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mpmc,byte-lane-low;
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mpmc,write-enable-delay = <0>;
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mpmc,output-enable-delay = <0>;
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mpmc,read-access-delay = <70>;
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mpmc,page-mode-read-delay = <70>;
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flash@0,0 {
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compatible = "sst,sst39vf320", "cfi-flash";
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reg = <0 0 0x400000>;
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bank-width = <2>;
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "bootloader";
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reg = <0x000000 0x040000>; /* 256 KiB */
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};
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partition@1 {
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label = "kernel";
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reg = <0x040000 0x2C0000>; /* 2.75 MiB */
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};
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partition@2 {
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label = "rootfs";
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reg = <0x300000 0x100000>; /* 1 MiB */
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};
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};
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};
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cs2 {
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#address-cells = <2>;
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#size-cells = <1>;
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ranges;
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mpmc,cs = <2>;
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mpmc,memory-width = <16>;
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mpmc,byte-lane-low;
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mpmc,write-enable-delay = <0>;
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mpmc,output-enable-delay = <30>;
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mpmc,read-access-delay = <90>;
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mpmc,page-mode-read-delay = <55>;
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mpmc,write-access-delay = <55>;
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mpmc,turn-round-delay = <55>;
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ext_sram: sram@2,0 {
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compatible = "mmio-sram";
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reg = <2 0 0x80000>; /* 512 KiB SRAM on IS62WV25616 */
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};
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};
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};
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&enet_tx_clk {
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clock-frequency = <25000000>;
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};
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&i2c0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins>;
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clock-frequency = <400000>;
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/* NXP SE97BTP with temperature sensor + eeprom */
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sensor@18 {
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compatible = "nxp,jc42";
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reg = <0x18>;
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};
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eeprom@50 {
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compatible = "nxp,24c02";
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reg = <0x50>;
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};
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pca_gpio: gpio@24 {
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compatible = "nxp,pca9673";
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reg = <0x24>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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&mac {
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status = "okay";
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phy-mode = "mii";
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pinctrl-names = "default";
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pinctrl-0 = <&enet_mii_pins>;
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};
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&spifi {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&spifi_pins>;
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flash@0 {
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compatible = "jedec,spi-nor";
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spi-rx-bus-width = <4>;
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "bootloader";
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reg = <0x000000 0x040000>; /* 256 KiB */
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};
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partition@1 {
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label = "kernel";
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reg = <0x040000 0x2c0000>; /* 2.75 MiB */
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};
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partition@2 {
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label = "rootfs";
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reg = <0x300000 0x500000>; /* 5 MiB */
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};
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};
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};
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&uart0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins>;
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};
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